DSPIC30F5016-20E/PT Microchip Technology, DSPIC30F5016-20E/PT Datasheet - Page 156
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
DSPIC30F5016-20E/PT
Manufacturer Part Number
DSPIC30F5016-20E/PT
Description
IC DSPIC MCU/DSP 66K 80TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20IP.pdf
(26 pages)
3.DSPIC30F5016-30IPT.pdf
(230 pages)
4.DSPIC30F5016-30IPT.pdf
(14 pages)
5.DSPIC30F5016-30IPT.pdf
(6 pages)
6.DSPIC30F5016-30IPT.pdf
(18 pages)
Specifications of DSPIC30F5016-20E/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
66KB (22K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-TFQFP
For Use With
AC164320 - MODULE SKT MPLAB PM3 80TQFPAC30F007 - MODULE SKT FOR DSPIC30F 80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F5016-20E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- DSPIC30F2011-20ISO PDF datasheet
- DSPIC30F2011-20IP PDF datasheet #2
- DSPIC30F5016-30IPT PDF datasheet #3
- DSPIC30F5016-30IPT PDF datasheet #4
- DSPIC30F5016-30IPT PDF datasheet #5
- DSPIC30F5016-30IPT PDF datasheet #6
- Current page: 156 of 230
- Download datasheet (4Mb)
dsPIC30F5015/5016
The configuration guidelines give the required setup
values for the conversion speeds above 500 ksps,
since they require external V
are some differences in the configuration procedure.
Configuration details that are not critical to the
conversion speed have been omitted.
The following figure depicts the recommended circuit
for the conversion rates above 500 ksps.
FIGURE 21-2:
21.7.1
The configuration for 1 Msps operation is dependent on
whether a single input pin is to be sampled or whether
multiple pins will be sampled.
21.7.1.1
For conversions at 1 Msps for a single analog input, at
least two sample and hold channels must be enabled.
The analog input multiplexer must be configured so
that the same input pin is connected to both sample
and hold channels. The ADC converts the value held
on one S/H channel, while the second S/H channel
acquires a new input sample.
DS70149D-page 156
C2
0.1 μF
R2
10
V
DD
1 Msps CONFIGURATION
GUIDELINE
C1
0.01 μF
Single Analog Input
V
DD
R1
10
ADC VOLTAGE REFERENCE SCHEMATIC
REF
pins usage and there
1
2
3
4
5
6
MCLR
8
V
V
11
12
13
14
V
V
REF
REF
SS
DD
AV
-
+
DD
dsPIC30F5015
V
DD
V
DD
21.7.1.2
The ADC can also be used to sample multiple analog
inputs using multiple sample and hold channels. In this
case, the total 1 Msps conversion rate is divided among
the different input signals. For example, four inputs can
be sampled at a rate of 250 ksps for each signal or two
inputs could be sampled at a rate of 500 ksps for each
signal. Sequential sampling must be used in this
configuration to allow adequate sampling time on each
input.
V
V
Multiple Analog Inputs
43
42
40
39
DD
37
48
47
46
45
44
SS
36
35
34
33
V
DD
© 2008 Microchip Technology Inc.
C8
1 mF
C5
1 mF
V
V
DD
DD
C7
0.1 mF
C4
0.1 mF
V
V
DD
DD
C6
0.01 mF
C3
0.01 mF
V
V
DD
DD
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