DSPIC30F5016-20E/PT Microchip Technology, DSPIC30F5016-20E/PT Datasheet - Page 139
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
DSPIC30F5016-20E/PT
Manufacturer Part Number
DSPIC30F5016-20E/PT
Description
IC DSPIC MCU/DSP 66K 80TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20IP.pdf
(26 pages)
3.DSPIC30F5016-30IPT.pdf
(230 pages)
4.DSPIC30F5016-30IPT.pdf
(14 pages)
5.DSPIC30F5016-30IPT.pdf
(6 pages)
6.DSPIC30F5016-30IPT.pdf
(18 pages)
Specifications of DSPIC30F5016-20E/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
66KB (22K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-TFQFP
For Use With
AC164320 - MODULE SKT MPLAB PM3 80TQFPAC30F007 - MODULE SKT FOR DSPIC30F 80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F5016-20E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- DSPIC30F2011-20ISO PDF datasheet
- DSPIC30F2011-20IP PDF datasheet #2
- DSPIC30F5016-30IPT PDF datasheet #3
- DSPIC30F5016-30IPT PDF datasheet #4
- DSPIC30F5016-30IPT PDF datasheet #5
- DSPIC30F5016-30IPT PDF datasheet #6
- Current page: 139 of 230
- Download datasheet (4Mb)
20.2.2
In order to ensure that a crystal oscillator (or ceramic
resonator) has started and stabilized, an Oscillator
Start-up Timer is included. It is a simple 10-bit counter
that counts 1024 T
oscillator clock to the rest of the system. The time-out
period is designated as T
every time the oscillator has to restart (i.e., on POR,
BOR and wake-up from Sleep). The Oscillator Start-up
Timer is applied to the LP, XT, XTL, and HS Oscillator
modes (upon wake-up from Sleep, POR and BOR) for
the primary oscillator.
20.2.3
Enabling the LP oscillator is controlled with two
elements:
1.
2.
The LP oscillator is ON (even during Sleep mode) if
LPOSCEN = 1. The LP oscillator is the device clock if:
• COSC<2:0> = 000 (LP selected as main oscillator)
• LPOSCEN = 1
Keeping the LP oscillator ON at all times allows for a
fast switch to the 32 kHz system clock for lower power
operation. Returning to the faster main oscillator will
still require a start-up time.
20.2.4
The PLL multiplies the clock which is generated by the
primary oscillator. The PLL is selectable to have either
gains of x4, x8 and x16. Input and output frequency
ranges are summarized in Table 20-3.
TABLE 20-3:
The PLL features a lock output, which is asserted when
the PLL enters a phase locked state. Should the loop
fall out of lock (e.g., due to noise), the lock signal will be
rescinded. The state of this signal is reflected in the
read-only LOCK bit in the OSCCON register.
© 2008 Microchip Technology Inc.
4 MHz-10 MHz
4 MHz-10 MHz
4 MHz-7.5 MHz
and
The current oscillator group bits COSC<2:0>
The LPOSCEN bit (OSCCON register)
Fin
LP OSCILLATOR CONTROL
OSCILLATOR START-UP TIMER
(OST)
PHASE LOCKED LOOP (PLL)
PLL FREQUENCY RANGE
OSC
Multiplier
OST
PLL
x16
cycles before releasing the
x4
x8
. The T
16 MHz-40 MHz
32 MHz-80 MHz
64 MHz-120 MHz
OST
time is involved
Fout
20.2.5
The FRC oscillator is a fast (7.37 MHz ±2% nominal)
internal RC oscillator. This oscillator is intended to
provide reasonable device operating speeds without
the use of an external crystal, ceramic resonator or RC
network. The FRC oscillator can be used with the PLL
to obtain higher clock frequencies.
The dsPIC30F operates from the FRC oscillator
whenever the current oscillator selection control bits in
the OSCCON register (OSCCON<14:12>) are set to
‘001’.
The 6-bit field specified by TUN<4:0> (OSCTUN<4:0>)
allows the user to tune the internal fast RC oscillator
(nominal 7.37 MHz). The user can tune the FRC
oscillator within a range of +12.6% (930 kHz) and -13%
(960
factory-calibrated setting, see Table 20-4.
If OSCCON<14:12> are set to ‘111’ and FPR<4:0> are
set to ‘00101’, ‘00110’ or ‘00111’, then a PLL
multiplier of 4, 8 or 16 (respectively) is applied.
TABLE 20-4:
Note:
TUN<5:0>
dsPIC30F5015/5016
01 1111
01 1110
01 1101
00 0100
00 0011
00 0010
00 0001
00 0000
11 1111
11 1110
11 1101
11 1100
10 0011
10 0010
10 0001
10 0000
Bits
...
...
kHz)
FAST RC OSCILLATOR (FRC)
When a 16x PLL is used, the FRC
oscillator must not be tuned to a frequency
greater than 7.5 MHz.
in
Center Frequency (oscillator is
running at calibrated frequency)
FRC TUNING
steps
FRC Frequency
of
+12.6%
+12.2%
+11.8%
...
+1.6%
+1.2%
+0.8%
+0.4%
-0.4%
-0.8%
-1.2%
-1.6%
...
-11.8%
-12.2%
-12.6%
-13.0%
0.4%
DS70149D-page 139
around
the
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