ATMEGA162-16MU Atmel, ATMEGA162-16MU Datasheet - Page 223

IC AVR MCU 16K 16MHZ 5V 44-QFN

ATMEGA162-16MU

Manufacturer Part Number
ATMEGA162-16MU
Description
IC AVR MCU 16K 16MHZ 5V 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA162-16MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
JTAG/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Package
44MLF EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Controller Family/series
AVR MEGA
No. Of I/o's
35
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA162-16MU
Manufacturer:
QFN
Quantity:
20 000
Addressing the
Flash During Self-
programming
2513K–AVR–07/09
The Z-pointer is used to address the SPM commands.
Since the Flash is organized in pages (see
be treated as having two different sections. One section, consisting of the least significant bits, is
addressing the words within a page, while the most significant bits are addressing the pages.
This is shown in
independently. Therefore it is of major importance that the Boot Loader software addresses the
same page in both the Page Erase and Page Write operation. Once a programming operation is
initiated, the address is latched and the Z-pointer can be used for other operations.
The only SPM operation that does not use the Z-pointer is Setting the Boot Loader Lock bits.
The content of the Z-pointer is ignored and will have no effect on the operation. The LPM
instruction does also use the Z-pointer to store the address. Since this instruction addresses the
Flash byte-by-byte, also the LSB (bit Z0) of the Z-pointer is used.
Figure 95. Addressing the Flash during SPM
Notes:
Bit
ZH (R31)
ZL (R30)
Z - REGISTER
1. The different variables used in
2. PCPAGE and PCWORD are listed in
PROGRAM MEMORY
BIT
Z15
PROGRAM
COUNTER
15
Z7
15
PAGE
7
Figure
PAGE ADDRESS
WITHIN THE FLASH
ZPCMSB
PCMSB
Z14
95. Note that the Page Erase and Page Write operations are addressed
Z6
14
6
PCPAGE
Z13
13
Z5
5
Figure 95
Z12
12
Z4
4
ZPAGEMSB
PAGEMSB
PCWORD
Table 105 on page
Table 105 on page
(1)
WORD ADDRESS
WITHIN A PAGE
are listed in
Z11
11
Z3
3
1
0
0
INSTRUCTION WORD
Z10
10
Z2
2
Table 95 on page
PAGE
236.
236), the Program Counter can
Z9
Z1
9
1
ATmega162/V
Z8
Z0
8
0
PCWORD[PAGEMSB:0]:
230.
00
01
02
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