AT32UC3B0128-A2UR Atmel, AT32UC3B0128-A2UR Datasheet - Page 365
![MCU AVR32 128K FLASH 64-TQFP](/photos/6/81/68127/313-64-vqfp_sml.jpg)
AT32UC3B0128-A2UR
Manufacturer Part Number
AT32UC3B0128-A2UR
Description
MCU AVR32 128K FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3B164-AUR.pdf
(680 pages)
Specifications of AT32UC3B0128-A2UR
Package / Case
64-TQFP, 64-VQFP
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
60MHz
Number Of I /o
44
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32K x 8
Program Memory Size
128KB (128K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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22. USB On-The-Go Interface (USBB)
22.1
22.2
Table 22-1.
32059J–12/2010
Pipe/Endpoint
Features
Overview
0
1
2
3
4
5
6
Description of USB Pipes/Endpoints
Mnemonic
Rev: 3.1.0.1.8
•
•
•
•
•
•
•
•
The Universal Serial Bus (USB) MCU device complies with the Universal Serial Bus (USB) 2.0
specification, but it does NOT feature Hi-Speed USB (480 Mbit/s).
Each pipe/endpoint can be configured in one of several transfer types. It can be associated with
one or more banks of a dual-port RAM (DPRAM) used to store the current data payload. If sev-
eral banks are used (“ping-pong” mode), then one DPRAM bank is read or written by the CPU or
the DMA while the other is read or written by the USBB core. This feature is mandatory for iso-
chronous pipes/endpoints.
Table 22-1 on page 365
PEP0
PEP1
PEP2
PEP3
PEP4
PEP5
PEP6
The theoretical maximal pipe/endpoint configuration (1600) exceeds the real DPRAM size (960).
The user needs to be aware of this when configuring pipes/endpoints. To fully use the 960 of
DPRAM, the user could for example use the configuration described in
Table 22-2.
Compatible with the USB 2.0 specification
Supports Full (12Mbit/s) and Low (1.5 Mbit/s) speed Device and Embedded Host
seven pipes/endpoints
960 of Embedded Dual-Port RAM (DPRAM) for Pipes/Endpoints
Up to 2 memory banks per Pipe/Endpoint (Not for Control Pipe/Endpoint)
Flexible Pipe/Endpoint configuration and management with dedicated DMA channels
On-Chip transceivers including Pull-Ups/Pull-downs
On-Chip pad including VBUS analog comparator
Pipe/Endpoint
0
1
2
3
Example of Configuration of Pipes/Endpoints Using the Whole DPRAM
Max. Size
256 bytes
256 bytes
64 bytes
64 bytes
64 bytes
64 bytes
64 bytes
Mnemonic
describes the hardware configuration of the USB MCU device.
PEP0
PEP1
PEP2
PEP3
Max. Nb. Banks
1
2
2
2
2
2
2
64 bytes
64 bytes
64 bytes
64 bytes
Size
DMA
N
Y
Y
Y
Y
Y
Y
Isochronous/Bulk/Interrupt/Control
Isochronous/Bulk/Interrupt/Control
Isochronous/Bulk/Interrupt/Control
Isochronous/Bulk/Interrupt/Control
Isochronous/Bulk/Interrupt/Control
Isochronous/Bulk/Interrupt/Control
Nb. Banks
1
1
1
2
Table 22-2 on page 365
Control
AT32UC3B
Type
365
.
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