AT32UC3B0128-A2UR Atmel, AT32UC3B0128-A2UR Datasheet - Page 269
![MCU AVR32 128K FLASH 64-TQFP](/photos/6/81/68127/313-64-vqfp_sml.jpg)
AT32UC3B0128-A2UR
Manufacturer Part Number
AT32UC3B0128-A2UR
Description
MCU AVR32 128K FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3B164-AUR.pdf
(680 pages)
Specifications of AT32UC3B0128-A2UR
Package / Case
64-TQFP, 64-VQFP
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
60MHz
Number Of I /o
44
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32K x 8
Program Memory Size
128KB (128K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Figure 20-8. Transmitter Block Diagram
20.7.3
32059J–12/2010
Transmitter Clock
RX_FRAME_SYNC
Receiver Operations
TX_FRAME_SYNC
TFMR.DATLEN
TCMR.STTDLY
TFMR.FSDEN
Selector
Start
A received frame is triggered by a start event and can be followed by synchronization data
before data transmission.
The start event is configured by writing to the RCMR register. See
The frame synchronization is configured by writing to the Receive Frame Mode Register
(RFMR). See
The receiver uses a shift register clocked by the receiver clock signal and the start mode
selected in the RCMR register. The data is transferred from the shift register depending on the
data format selected.
When the receiver shift register is full, the SSC transfers this data in the Receive Holding Regis-
ter (RHR), the Receive Ready bit is set in the SR register (SR.RXREADY) and the data can be
read in the RHR register. If another transfer occurs before a read of the RHR
Receive Overrun bit is set in the SR register (SR.OVRUN) and the receiver shift register is trans-
ferred to the RHR register.
TFMR.MSBF
THR
Transmit Shift Register
Section
TFMR.DATDEF
0
20.7.5.
1
TSHR
0
1
TFMR.FSLEN
TCMR.STTDLY
TFMR.DATNB
TFMR.FSDEN
CR.TXEN
CR.TXDIS
SR.TXEN
Section
20.7.4.
AT32UC3B
TX_DATA
register
, the
269
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