PIC18F2431-I/SO Microchip Technology, PIC18F2431-I/SO Datasheet - Page 94

• Manufacturer Part Number: PIC18F2431-I/SO
• Description: IC PIC MCU FLASH 8KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2431-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART/I2C/SPI/SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183021, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5-ch x 10-bit
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILI3-DB18F4431 - BOARD DAUGHTER ICEPIC3
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2331/2431/4331/4431
EXAMPLE 8-3:
8.5.2
Depending on the application, good programming
practice may dictate that the value written to the
memory should be verified against the original value.
This should be used in applications where excessive
writes can stress bits near the specification limit.
8.5.3
If a write is terminated by an unplanned event, such as
loss of power or an unexpected Reset, the memory
location just programmed should be verified and
TABLE 8-2:
DS39616D-page 94
TBLPTRU
TBPLTRH Program Memory Table Pointer High Byte (TBLPTR<15:8>)
TBLPTRL Program Memory Table Pointer Low Byte (TBLPTR<7:0>)
TABLAT
INTCON
EECON2 EEPROM Control Register 2 (not a physical register)
EECON1
IPR2
PIR2
PIE2
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used during Flash/EEPROM access.
Note 1:
PROGRAM_MEMORY
Name
Bit 21 of the PC is only available in Test mode and Serial Programming modes.
WRITE VERIFY
UNEXPECTED TERMINATION OF
WRITE OPERATION
Program Memory Table Latch
GIE/GIEH PEIE/GIEL TMR0IE
OSCFIP
OSCFIF
OSCFIE
EEPGD
Bit 7
BCF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
NOP
BSF
DECFSZ COUNTER_HI
GOTO
BCF
—
REGISTERS ASSOCIATED WITH PROGRAM FLASH MEMORY
WRITING TO FLASH PROGRAM MEMORY (CONTINUED)
INTCON, GIE
55h
EECON2
0AAh
EECON2
EECON1, WR
INTCON, GIE
PROGRAM_LOOP
EECON1, WREN
CFGS
Bit 6
—
—
—
—
bit 21
Bit 5
—
—
—
—
(1)
Program Memory Table Pointer Upper Byte (TBLPTR<20:16>)
INT0IE
FREE
EEIP
EEIE
Bit 4
EEIF
; disable interrupts
; required sequence
; write 55h
; write 0AAh
; start program (CPU stall)
; re-enable interrupts
; loop until done
; disable write to memory
WRERR
RBIE
Bit 3
—
—
—
reprogrammed if needed. The WRERR bit is set when
a write operation is interrupted by a MCLR Reset, or a
WDT Time-out Reset during normal operation. In these
situations, users can check the WRERR bit and rewrite
the location.
8.6
See
Protection”
program memory.
Section 23.5 “Program Verification and Code
TMR0IF
WREN
LVDIP
LVDIF
LVDIE
Bit 2
Flash Program Operation During
Code Protection
for details on code protection of Flash
INT0IF
Bit 1
WR
—
—
—
 2010 Microchip Technology Inc.
CCP2IP
CCP2IE
CCP2IF
RBIF
Bit 0
RD
on Page:
Values
Reset
54
54
54
54
54
56
56
57
57
57