PIC18F2431-I/SO Microchip Technology, PIC18F2431-I/SO Datasheet - Page 230

• Manufacturer Part Number: PIC18F2431-I/SO
• Description: IC PIC MCU FLASH 8KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2431-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART/I2C/SPI/SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183021, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5-ch x 10-bit
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILI3-DB18F4431 - BOARD DAUGHTER ICEPIC3
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2331/2431/4331/4431
To set up an Asynchronous Transmission:
1.
2.
3.
4.
FIGURE 20-6:
TABLE 20-6:
DS39616D-page 230
INTCON
PIR1
PIE1
IPR1
RCSTA
RCREG
TXSTA
BAUDCON
SPBRGH
SPBRG
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for asynchronous reception.
Name
Initialize the SPBRG register for the appropriate
baud rate. If a high-speed baud rate is desired,
set bit, BRGH (see
Baud Rate Generator
Enable the asynchronous serial port by clearing
bit, SYNC, and setting bit, SPEN.
If interrupts are desired, set enable bit, TXIE.
If 9-bit transmission is desired, set transmit bit,
TX9. Can be used as address/data bit.
Note:
RX (Pin)
Rcv Shift
Reg
Rcv Buffer Reg
Read Rcv
Buffer Reg
RCREG
RCIF
(Interrupt Flag)
OERR bit
CREN
EUSART Receive Register
EUSART Baud Rate Generator Register High Byte
EUSART Baud Rate Generator Register Low Byte
GIE/GIEH
This timing diagram shows three words appearing on the RX input. The RCREG (Receive Buffer) is read after
the third word, causing the OERR (Overrun) bit to be set.
CSRC
SPEN
Bit 7
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
—
—
—
—
Start
ASYNCHRONOUS RECEPTION
bit
Section 20.2 “EUSART
bit 0
PEIE/GIEL
(BRG)”).
RCIDL
ADIF
ADIE
ADIP
Bit 6
RX9
TX9
bit 1
TMR0IE
SREN
TXEN
RCIE
RCIP
RCIF
Bit 5
—
bit 7/8
Stop
bit
INT0IE
CREN
SYNC
SCKP
TXIF
TXIE
TXIP
Bit 4
Word 1
RCREG
Start
bit
bit 0
ADDEN
SENDB
BRG16
SSPIE
SSPIP
SSPIF
5.
6.
7.
If using interrupts, ensure that the GIE and PEIE bits in
the INTCON register (INTCON<7:6>) are set.
RBIE
Bit 3
Enable the transmission by setting bit, TXEN,
which will also set bit, TXIF.
If 9-bit transmission is selected, the ninth bit
should be loaded in bit, TX9D.
Load data to the TXREG register (starts
transmission).
TMR0IF
CCP1IE TMR2IE
CCP1IP TMR2IP
CCP1IF
BRGH
FERR
bit 7/8
Bit 2
Word 2
RCREG
—
Stop
bit
TMR2IF
INT0IF
OERR
TRMT
WUE
Bit 1
Start
bit
 2010 Microchip Technology Inc.
TMR1IE
TMR1IP
TMR1IF
ABDEN
RX9D
TX9D
Bit 0
RBIF
bit 7/8
Reset Values
Stop
on Page:
bit
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