ATMEGA3290P-20AUR Atmel, ATMEGA3290P-20AUR Datasheet - Page 230
![MCU AVR 32K FLASH 20MHZ 64TQFP](/photos/6/70/67048/313-100-tqfp_sml.jpg)
ATMEGA3290P-20AUR
Manufacturer Part Number
ATMEGA3290P-20AUR
Description
MCU AVR 32K FLASH 20MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA3290P-20AUR
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Manufacturer
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23. LCD Controller
23.1
23.2
23.2.1
8021G–AVR–03/11
Features
Overview
Definitions
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The LCD Controller/driver is intended for monochrome passive liquid crystal display (LCD) with
up to four common terminals and up to 25/40 segment terminals.
A simplified block diagram of the LCD Controller/Driver is shown in
placement of I/O pins, refer to
ATmega3290P” on page
An LCD consists of several segments (pixels or complete symbols) which can be visible or non
visible. A segment has two electrodes with liquid crystal between them. When a voltage above a
threshold voltage is applied across the liquid crystal, the segment becomes visible.
The voltage must alternate to avoid an electrophoresis effect in the liquid crystal, which
degrades the display. Hence the waveform across a segment must not have a DC-component.
The PRLCD bit in
enable the LCD module.
Several terms are used when describing LCD. The definitions in
this document.
Table 23-1.
LCD
Segment
Common
Duty
Bias
Frame Rate
Display Capacity of 25/40 Segments and Four Common Terminals
Support Static, 1/2, 1/3 and 1/4 Duty
Support Static, 1/2, 1/3 Bias
On-chip LCD Power Supply, only One External Capacitor needed
Display Possible in Power-save Mode for Low Power Consumption
Software Selectable Low Power Waveform Capability
Flexible Selection of Frame Frequency
Software Selection between System Clock or an External Asynchronous Clock Source
Equal Source and Sink Capability to maximize LCD Life Time
LCD Interrupt Can be Used for Display Data Update or Wake-up from Sleep Mode
Segment and Common Pins not Needed for Driving the Display Can be Used as Ordinary I/O Pins
Latching of Display Data gives Full Freedom in Register Update
Definitions
A passive display panel with terminals leading directly to a segment
The least viewing element (pixel) which can be on or off
Denotes how many segments are connected to a segment terminal
1/(Number of common terminals on a actual LCD display)
1/(Number of voltage levels used driving a LCD display -1)
Number of times the LCD segments is energized per second.
”PRR – Power Reduction Register” on page 43
3.
”MLF/ Pinout ATmega329P” on page 2
ATmega329P/3290P
Table 23-1
Figure
must be written to zero to
and
are used throughout
23-1. For the actual
”TQFP / Pinout
230
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