ATMEGA32U2-MU Atmel, ATMEGA32U2-MU Datasheet - Page 190

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ATMEGA32U2-MU

Manufacturer Part Number
ATMEGA32U2-MU
Description
MCU AVR USB 32K FLASH IND 32VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA32U2-MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2.5 KB
Interface Type
SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
22
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
Minimum Operating Temperature
- 40 C
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
 Details
20.4.3
7799D–AVR–11/10
Interrupts
When the USB controller is in reset state:
After setting USBE, the USB Controller enters in the Device state.
The USB Controller can at any time be reset by clearing USBE.
Two interrupts vectors are assigned to the USB controller.
Figure 20-8. USB Interrupt System
The USB module distinguishes between USB General events and USB Endpoints events.
Figure 20-9. USB General interrupt vector sources
The WAKEUP interrupt allows device wake-up from power-down mode, and is an asynchronous
interrupt, triggering each time a state change is detected on the data lines. The other interrupts
are synchronous and will be detected only if the USB clock is enabled (FRZCLK bit set).
• USBE is not set
• the USB controller clock is stopped in order to minimize the power consumption (FRZCLK=1)
• the USB controller is disabled
• USB is in the suspend mode
• the Device USB controllers internal state is reset
• The DPACC bit and the DPADD10:0 field can be set by software. The DPRAM is not cleared.
• The SPDCONF bits can be set by software
UPRSMI
UDINT.6
EORSMI
UDINT.5
WAKEUPI
UDINT.4
UDINT.3
UDINT.2
UDINT.0
EORSTI
SUSPI
SOFI
Endpoint
Interrupt
USB Device
Interrupt
UPRSME
EORSME
WAKEUPE
EORSTE
UDIEN.6
UDIEN.5
UDIEN.4
UDIEN.3
UDIEN.2
UDIEN.0
SUSPE
SOFE
ATmega8U2/16U2/32U2
Asynchronous Interrupt source
(allows the CPU to wake up from power down mode)
Interrupt Vector
USB General
USB Endpoint/Pipe
Interrupt Vector
Interrupt Vector
USB General
190

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