ATMEGA32U2-MU Atmel, ATMEGA32U2-MU Datasheet - Page 130
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ATMEGA32U2-MU
Manufacturer Part Number
ATMEGA32U2-MU
Description
MCU AVR USB 32K FLASH IND 32VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32U2-MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2.5 KB
Interface Type
SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
22
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
Minimum Operating Temperature
- 40 C
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
- Current page: 130 of 309
- Download datasheet (6Mb)
7799D–AVR–11/10
.
Table 16-1.
Table 16-2
PWM mode.
Table 16-2.
Note:
Table 16-3
correct and frequency correct PWM mode.
COMnA1/COMnB1/
COMnA1/COMnB1/
COMnC1
COMnC0
A special case occurs when OCRnA/OCRnB/OCRnC equals TOP and
COMnA1/COMnB1/COMnC1 is set. In this case the compare match is ignored, but the set or clear
is done at TOP.
shows the COMnx[1:0] bit functionality when the WGMn[3:0] bits are set to the phase
0
0
1
1
shows the COMnx[1:0] bit functionality when the WGMn[3:0] bits are set to the fast
0
0
1
1
Compare Output Mode, non-PWM
Compare Output Mode, Fast PWM
See “Fast PWM Mode” on page 97.
COMnA0/COMnB0/
COMnA0/COMnB0/
COMnC0
COMnC0
0
1
0
1
0
1
0
1
Description
Normal port operation, OCnA/OCnB/OCnC
disconnected.
Toggle OCnA/OCnB/OCnC on compare match.
Clear OCnA/OCnB/OCnC on compare match
(set output to low level).
Set OCnA/OCnB/OCnC on compare match (set
output to high level).
Description
Normal port operation, OCnA/OCnB/OCnC
disconnected.
WGM1[3:0] = 14 or 15: Toggle OC1A on
Compare Match, OC1B and OC1C disconnected
(normal port operation). For all other WGM1
settings, normal port operation,
OC1A/OC1B/OC1C disconnected.
Clear OCnA/OCnB/OCnC on compare match,
set OCnA/OCnB/OCnC at TOP
Set OCnA/OCnB/OCnC on compare match,
clear OCnA/OCnB/OCnC at TOP
ATmega8U2/16U2/32U2
for more details.
130
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