ATMEGA645A-MUR Atmel, ATMEGA645A-MUR Datasheet - Page 42

IC MCU AVR 64K FLASH 64QFN

ATMEGA645A-MUR

Manufacturer Part Number
ATMEGA645A-MUR
Description
IC MCU AVR 64K FLASH 64QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA645A-MUR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Price
Part Number:
ATMEGA645A-MUR
Manufacturer:
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Quantity:
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9.10.2
9.10.3
9.10.4
9.10.5
9.10.6
42
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/645
Analog Comparator
Brown-out Detector
Internal Voltage Reference
Watchdog Timer
Port Pins
conversion will be an extended conversion. Refer to
214
When entering Idle mode, the Analog Comparator should be disabled if not used. When entering
ADC Noise Reduction mode, the Analog Comparator should be disabled. In other sleep modes,
the Analog Comparator is automatically disabled. However, if the Analog Comparator is set up
to use the Internal Voltage Reference as input, the Analog Comparator should be disabled in all
sleep modes. Otherwise, the Internal Voltage Reference will be enabled, independent of sleep
mode. Refer to
log Comparator.
If the Brown-out Detector is not needed by the application, this module should be turned off. If
the Brown-out Detector is enabled by the BODLEVEL Fuses, it will be enabled in all sleep
modes, and hence, always consume power. In the deeper sleep modes, this will contribute sig-
nificantly to the total current consumption. Refer to
on how to configure the Brown-out Detector.
The Internal Voltage Reference will be enabled when needed by the Brown-out Detection, the
Analog Comparator or the ADC. If these modules are disabled as described in the sections
above, the internal voltage reference will be disabled and it will not be consuming power. When
turned on again, the user must allow the reference to start up before the output is used. If the
reference is kept on in sleep mode, the output can be used immediately. Refer to
age Reference” on page 50
If the Watchdog Timer is not needed in the application, the module should be turned off. If the
Watchdog Timer is enabled, it will be enabled in all sleep modes, and hence, always consume
power. In the deeper sleep modes, this will contribute significantly to the total current consump-
tion. Refer to
When entering a sleep mode, all port pins should be configured to use minimum power. The
most important is then to ensure that no pins drive resistive loads. In sleep modes where both
the I/O clock (clk
be disabled. This ensures that no power is consumed by the input logic when not needed. In
some cases, the input logic is needed for detecting wake-up conditions, and it will then be
enabled. Refer to the section
which pins are enabled. If the input buffer is enabled and the input signal is left floating or have
an analog signal level close to V
For analog input pins, the digital input buffer should be disabled at all times. An analog signal
level close to V
input buffers can be disabled by writing to the Digital Input Disable Registers (DIDR1 and
DIDR0). Refer to
Input Disable Register 0” on page 231
for details on ADC operation.
”Watchdog Timer” on page 50
”AC - Analog Comparator” on page 210
CC
I/O
”DIDR1 – Digital Input Disable Register 1” on page 213
/2 on an input pin can cause significant current even in active mode. Digital
) and the ADC clock (clk
for details on the start-up time.
”Digital Input Enable and Sleep Modes” on page 72
CC
/2, the input buffer will use excessive power.
for details.
ADC
for details on how to configure the Watchdog Timer.
) are stopped, the input buffers of the device will
”Brown-out Detection” on page 49
”ADC - Analog to Digital Converter” on page
for details on how to configure the Ana-
and
”DIDR0 – Digital
8285B–AVR–03/11
”Internal Volt-
for details on
for details

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