ATMEGA645A-MUR Atmel, ATMEGA645A-MUR Datasheet - Page 144

• Manufacturer Part Number: ATMEGA645A-MUR
• Description: IC MCU AVR 64K FLASH 64QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA645A-MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.6
17.6.1
144
Compare Match Output Unit
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/645
Compare Output Mode and Waveform Generation
The setup of the OC2A should be performed before setting the Data Direction Register for the
port pin to output. The easiest way of setting the OC2A value is to use the Force Output Com-
pare (FOC2A) strobe bit in Normal mode. The OC2A Register keeps its value even when
changing between Waveform Generation modes.
Be aware that the COM2A[1:0] bits are not double buffered together with the compare value.
Changing the COM2A[1:0] bits will take effect immediately.
The Compare Output mode (COM2A[1:0]) bits have two functions. The Waveform Generator
uses the COM2A[1:0] bits for defining the Output Compare (OC2A) state at the next compare
match. Also, the COM2A[1:0] bits control the OC2A pin output source.
plified schematic of the logic affected by the COM2A[1:0] bit setting. The I/O Registers, I/O bits,
and I/O pins in the figure are shown in bold. Only the parts of the general I/O Port Control Regis-
ters (DDR and PORT) that are affected by the COM2A[1:0] bits are shown. When referring to the
OC2A state, the reference is for the internal OC2A Register, not the OC2A pin.
Figure 17-4. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC2A) from the Waveform
Generator if either of the COM2A[1:0] bits are set. However, the OC2A pin direction (input or
output) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direc-
tion Register bit for the OC2A pin (DDR_OC2A) must be set as output before the OC2A value is
visible on the pin. The port override function is independent of the Waveform Generation mode.
The design of the Output Compare pin logic allows initialization of the OC2A state before the
output is enabled. Note that some COM2A[1:0] bits settings are reserved for certain modes of
operation.
The Waveform Generator uses the COM2A[1:0] bits differently in normal, CTC, and PWM
modes. For all modes, setting the COM2A[1:0] = 0 tells the Waveform Generator that no action
COMnx1
COMnx0
FOCnx
clk
I/O
See ”Register Description” on page 154.
Waveform
Generator
D
D
D
PORT
DDR
OCnx
Q
Q
Q
1
0
Figure 17-4
8285B–AVR–03/11
shows a sim-
OCnx
Pin