ATMEGA645A-MUR Atmel, ATMEGA645A-MUR Datasheet - Page 110

• Manufacturer Part Number: ATMEGA645A-MUR
• Description: IC MCU AVR 64K FLASH 64QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA645A-MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.2.1
110
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/645
Registers
Figure 15-1. 16-bit Timer/Counter Block Diagram
Note:
The Timer/Counter (TCNT1), Output Compare Registers (OCR1A/B), and Input Capture Regis-
ter (ICR1) are all 16-bit registers. Special procedures must be followed when accessing the 16-
bit registers. These procedures are described in the section
page
CPU access restrictions. Interrupt requests (abbreviated to Int.Req. in the figure) signals are all
visible in the Timer Interrupt Flag Register (TIFR1). All interrupts are individually masked with
the Timer Interrupt Mask Register (TIMSK1). TIFR1 and TIMSK1 are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the T1 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source
is selected. The output from the Clock Select logic is referred to as the timer clock (clk
The double buffered Output Compare Registers (OCR1A/B) are compared with the Timer/Coun-
ter value at all time. The result of the compare can be used by the Waveform Generator to
generate a PWM or variable frequency output on the Output Compare pin (OC1A/B).
put Compare Units” on page
Flag (OCF1A/B) which can be used to generate an Output Compare interrupt request.
111. The Timer/Counter Control Registers (TCCR1A/B) are 8-bit registers and have no
1. Refer to
and description.
Timer/Counter
Figure 1-1 on page 2
TCCRnA
OCRnB
OCRnA
TCNTn
ICRn
=
=
118.. The compare match event will also set the Compare Match
Direction
Count
Clear
and
Control Logic
TOP
Figure 13-5 on page 74
=
TCCRnB
Values
BOTTOM
Fixed
TOP
ICFn (Int.Req.)
(1)
clk
Detector
Edge
=
Tn
0
”Accessing 16-bit Registers” on
for Timer/Counter1 pin placement
OCnA
(Int.Req.)
OCnB
(Int.Req.)
TOVn
(Int.Req.)
Clock Select
Generation
Generation
( From Prescaler )
Waveform
Waveform
Canceler
Detector
Noise
Edge
Comparator Ouput )
( From Analog
8285B–AVR–03/11
OCnA
OCnB
T
See ”Out-
ICPn
1
Tn
).