PIC16F819-I/ML Microchip Technology, PIC16F819-I/ML Datasheet - Page 260

IC MCU FLASH 2KX14 EEPROM 28QFN

PIC16F819-I/ML

Manufacturer Part Number
PIC16F819-I/ML
Description
IC MCU FLASH 2KX14 EEPROM 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F819-I/ML

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
16
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
20MHz
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNAC164033 - ADAPTER 28QFN TO 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Lead Free Status / Rohs Status
 Details
PICmicro MID-RANGE MCU FAMILY
16.3.4
DS31016A-page 16-10
SSPIF
Interrupt flag
SCK
(CKP = 0)
SCK
(CKP = 1)
Master Operation
SDO
SDI
The master can initiate the data transfer at any time because it controls the SCK. The master
determines when the slave (Processor 2) wishes to broadcast data by the software protocol.
In master mode the data is transmitted/received as soon as the SSPBUF register is written to. If
the SPI is only going to receive, the SDO output could be disabled (programmed as an input).
The SSPSR register will continue to shift in the signal present on the SDI pin at the programmed
clock rate. As each byte is received, it will be loaded into the SSPBUF register as if a normal
received byte (interrupts and status bits appropriately set). This could be useful in receiver appli-
cations as a “line activity monitor” mode.
The clock polarity is selected by appropriately programming the CKP bit (SSPCON<4>). This
then would give waveforms for SPI communication as shown in
where the MSb is transmitted first. In master mode, the SPI clock rate (bit rate) is user program-
mable to be one of the following:
• F
• F
• F
• Timer2 output/2
This allows a maximum data rate of 5 Mbps (at 20 MHz).
Figure 16-3: SPI Mode Waveform (Master Mode)
OSC
OSC
OSC
bit7
bit7
/4 (or T
/16 (or 4 • T
/64 (or 16 • T
CY
bit6
)
CY
CY
)
)
bit5
bit4
bit3
bit2
bit1
Figure 16-5
1997 Microchip Technology Inc.
bit0
bit0
and
Figure 16-5

Related parts for PIC16F819-I/ML