PIC16F819-I/ML Microchip Technology, PIC16F819-I/ML Datasheet - Page 238

IC MCU FLASH 2KX14 EEPROM 28QFN

PIC16F819-I/ML

Manufacturer Part Number
PIC16F819-I/ML
Description
IC MCU FLASH 2KX14 EEPROM 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F819-I/ML

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
16
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
20MHz
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNAC164033 - ADAPTER 28QFN TO 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Lead Free Status / Rohs Status
 Details
PICmicro MID-RANGE MCU FAMILY
15.4.1
DS31015A-page 15-18
Slave Mode
In slave mode, the SCL and SDA pins must be configured as inputs (TRIS set). The SSP module
will override the input state with the output data when required (slave-transmitter).
When an address is matched or the data transfer after an address match is received, the hard-
ware automatically will generate the acknowledge (ACK) pulse, and then load the SSPBUF reg-
ister with the received value currently in the SSPSR register.
There are certain conditions that will cause the SSP module not to give this ACK pulse. These
are if either (or both):
a)
b)
In this case, the SSPSR register value is not loaded into the SSPBUF, but the SSPIF and SSPOV
bits are set.
tus of bits BF and SSPOV. The shaded cells show the condition where user software did not prop-
erly clear the overflow condition. Flag bit BF is cleared by reading the SSPBUF register while bit
SSPOV is cleared through software.
The SCL clock input must have a minimum high and low time for proper operation. The high and
low times of the I
Device Data Sheet electrical specifications
The buffer full bit, BF (SSPSTAT<0>), was set before the message completed.
The overflow bit, SSPOV (SSPCON<6>), was set before the message completed.
Table 15-2
2
C specification as well as the requirement of the SSP module is shown in
shows what happens when a data transfer byte is received, given the sta-
parameters 100
and 101.
1997 Microchip Technology Inc.

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