PIC18F65J90-I/PT Microchip Technology, PIC18F65J90-I/PT Datasheet - Page 405

• Manufacturer Part Number: PIC18F65J90-I/PT
• Description: IC PIC MCU FLASH 16KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F65J90-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 51
• Ram Memory Size: 2KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183030
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Core Features
CPFSEQ .......................................................................... 322
CPFSGT .......................................................................... 323
CPFSLT ........................................................................... 323
Crystal Oscillator/Ceramic Resonator ................................ 39
Customer Change Notification Service ............................ 413
Customer Notification Service .......................................... 413
Customer Support ............................................................ 413
D
Data Addressing Modes ..................................................... 80
Data Memory ..................................................................... 70
DAW ................................................................................. 324
DC Characteristics ........................................................... 370
DCFSNZ .......................................................................... 325
DECF ............................................................................... 324
DECFSZ ........................................................................... 325
Default System Clock ......................................................... 38
Details on Individual Family Members ............................... 10
Development Support ...................................................... 355
Device Overview .................................................................. 9
Direct Addressing ............................................................... 81
E
Effect on Standard PIC18 Instructions ............................. 352
Effects of Power-Managed Modes on
Electrical Characteristics .................................................. 359
Enhanced Universal Synchronous Asynchronous Receiver
ENVREG Pin .................................................................... 299
 2010 Microchip Technology Inc.
Easy Migration ............................................................. 9
Extended Instruction Set .............................................. 9
Memory Options ........................................................... 9
nanoWatt Technology .................................................. 9
Oscillator Options and Features .................................. 9
Comparing Addressing Modes with
Direct .......................................................................... 80
Indexed Literal Offset ................................................. 83
Indirect ....................................................................... 80
Inherent and Literal .................................................... 80
Access Bank .............................................................. 73
Bank Select Register (BSR) ....................................... 70
Extended Instruction Set ............................................ 83
General Purpose Registers ........................................ 73
Memory Maps
Special Function Registers ........................................ 74
Power-Down and Supply Current ............................ 362
Supply Voltage ......................................................... 361
Features (64-Pin Devices) ......................................... 11
Features (80-Pin Devices) ......................................... 11
Various Clock Sources ............................................... 42
Transmitter (EUSART). See EUSART.
the Extended Instruction Set Enabled ............... 84
BSR ................................................................... 85
Instructions Affected .......................................... 83
Mapping Access Bank ....................................... 85
PIC18FX3J90/X4J90 Devices ........................... 71
PIC18FX5J90 Devices ....................................... 72
Special Function Registers ................................ 74
PIC18F85J90 FAMILY
Equations
Errata ................................................................................... 7
EUSART
Extended Instruction Set
External Oscillator Modes .................................................. 39
F
Fail-Safe Clock Monitor ........................................... 291, 301
Fast Register Stack ........................................................... 67
Firmware Instructions ...................................................... 305
16 x 16 Signed Multiplication Algorithm ..................... 98
16 x 16 Unsigned Multiplication Algorithm ................. 98
A/D Acquisition Time ............................................... 276
A/D Minimum Charging Time .................................. 276
Calculating the Minimum Required
LCD Static and Dynamic Current ............................ 173
Asynchronous Mode ................................................ 245
Baud Rate Generator (BRG) ................................... 239
Synchronous Master Mode ...................................... 251
Synchronous Slave Mode ........................................ 254
ADDFSR .................................................................. 348
ADDULNK ............................................................... 348
CALLW .................................................................... 349
MOVSF .................................................................... 349
MOVSS .................................................................... 350
PUSHL ..................................................................... 350
SUBFSR .................................................................. 351
SUBULNK ................................................................ 351
EC Modes .................................................................. 40
HS Modes .................................................................. 39
Exiting Fail-Safe Operation ...................................... 302
Interrupts in Power-Managed Modes ...................... 302
POR or Wake-up From Sleep .................................. 302
WDT During Oscillator Failure ................................. 301
Acquisition Time .............................................. 276
12-Bit Break Transmit and Receive ................. 250
Associated Registers, Receive ........................ 248
Associated Registers, Transmit ....................... 246
Auto-Wake-up on Sync Break ......................... 249
Receiver .......................................................... 247
Setting up 9-Bit Mode with Address Detect ..... 247
Transmitter ...................................................... 245
Associated Registers ....................................... 240
Auto-Baud Rate Detect .................................... 243
Baud Rate Error, Calculating ........................... 240
Baud Rates, Asynchronous Modes ................. 241
High Baud Rate Select (BRGH Bit) ................. 239
Operation in Power-Managed Modes .............. 239
Sampling ......................................................... 239
Associated Registers, Receive ........................ 253
Associated Registers, Transmit ....................... 252
Reception ........................................................ 253
Transmission ................................................... 251
Associated Registers, Receive ........................ 255
Associated Registers, Transmit ....................... 254
Reception ........................................................ 255
Transmission ................................................... 254
DS39770C-page 405