PIC18F65J90-I/PT Microchip Technology, PIC18F65J90-I/PT Datasheet - Page 127

• Manufacturer Part Number: PIC18F65J90-I/PT
• Description: IC PIC MCU FLASH 16KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F65J90-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 51
• Ram Memory Size: 2KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183030
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 10-12: PORTE FUNCTIONS
TABLE 10-13: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
 2010 Microchip Technology Inc.
RE0/LCDBIAS1
RE1/LCDBIAS2
RE3/COM0
RE4/COM1
RE5/COM2
RE6/COM3
RE7/CCP2/
SEG31
Legend:
Note 1:
PORTE
LATE
TRISE
PORTG
TRISG
LCDCON
LCDSE3
Legend: Shaded cells are not used by PORTE.
Note 1:
Pin Name
Name
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Alternate assignment for CCP2 when the CCP2MX Configuration bit is cleared.
Unimplemented on 64-pin devices, read as ‘0’.
TRISE7
LCDEN
SPIOD
LATE7
RDPU
SE31
Bit 7
RE7
LCDBIAS1
LCDBIAS2
Function
CCP2
SEG31
COM0
COM1
COM2
COM3
RE0
RE1
RE3
RE4
RE5
RE6
RE7
(1)
CCP2OD CCP1OD
TRISE6
SLPEN
LATE6
REPU
SE30
Bit 6
RE6
Setting
TRIS
—
—
0
1
0
1
0
1
x
0
1
x
0
1
x
0
1
x
0
1
0
1
x
RJPU
TRISE5
LATE5
WERR
SE29
Bit 5
RE5
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
(1)
Type
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
TRISG4
TRISE4
LATE4
SE28
Bit 4
RE4
RG4
—
LATE<0> data output.
PORTE<0> data input.
LCD module bias voltage input.
LATE<1> data output.
PORTE<1> data input.
LCD module bias voltage input.
LATE<3> data output.
PORTE<3> data input.
LCD Common 0 output; disables all other outputs.
LATE<4> data output.
PORTE<4> data input.
LCD Common 1 output; disables all other outputs.
LATE<5> data output.
PORTE<5> data input.
LCD Common 2 output; disables all other outputs.
LATE<6> data output.
PORTE<6> data input.
LCD Common 3 output; disables all other outputs.
LATE<7> data output.
PORTE<7> data input.
CCP2 compare/PWM output; takes priority over port data.
CCP2 capture input.
Segment 31 analog output for LCD; disables digital output.
PIC18F85J90 FAMILY
TRISG3
TRISE3
LATE3
SE27
Bit 3
RG3
RE3
CS1
TRISG2
SE26
Bit 2
RG2
CS0
—
—
—
Description
TRISG1
TRISE1
LMUX1
LATE1
SE25
Bit 1
RE1
RG1
TRISG0
TRISE0
LMUX0
LATE0
SE24
Bit 0
DS39770C-page 127
RG0
RE0
on page
Values
Reset
61
60
60
60
60
59
59