PIC18F65J90-I/PT Microchip Technology, PIC18F65J90-I/PT Datasheet - Page 388

• Manufacturer Part Number: PIC18F65J90-I/PT
• Description: IC PIC MCU FLASH 16KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F65J90-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 51
• Ram Memory Size: 2KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183030
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F85J90 FAMILY
FIGURE 26-15:
TABLE 26-20: MSSP I
FIGURE 26-16:
DS39770C-page 388
90
91
92
93
Note 1:
Param.
No.
Note:
SCL
SDA
2:
T
T
T
T
Symbol
SU
SU
HD
HD
Refer to Figure 26-3 for load conditions.
Maximum pin capacitance = 10 pF for all I
A minimum 16 MHz F
Note:
SCL
SDA
In
SDA
Out
:
:
:
:
STA
STO
STA
STO
Start Condition
Setup Time
Start Condition
Hold Time
Stop Condition
Setup Time
Stop Condition
Hold Time
90
Refer to Figure 26-3 for load conditions.
Condition
MSSP I
MSSP I
Start
90
2
C™ BUS START/STOP BITS REQUIREMENTS
103
91
Characteristic
91
2
2
C™ BUS START/STOP BITS TIMING WAVEFORMS
C™ BUS DATA TIMING
OSC
109
is required for 1 MHz I
1 MHz mode
400 kHz mode
1 MHz mode
100 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100
106
(1,2)
(1,2)
(1,2)
(1,2)
2
C™ pins.
101
109
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2
C.
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
Min
107
Max
—
—
—
—
—
—
—
—
—
—
—
—
92
92
 2010 Microchip Technology Inc.
Condition
Units
102
Stop
110
93
Only relevant for
Repeated Start
condition
After this period, the
first clock pulse is
generated
Conditions