AT90PWM3B-16MU Atmel, AT90PWM3B-16MU Datasheet - Page 275
![no-image](/images/manufacturer_photos/0/0/78/atmel_sml.jpg)
AT90PWM3B-16MU
Manufacturer Part Number
AT90PWM3B-16MU
Description
IC MCU AVR RISC 8K FLASH 32-QFN
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet
1.AT90PWM3B-16SU.pdf
(361 pages)
Specifications of AT90PWM3B-16MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
27
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-QFN
Package
32QFN EP
Device Core
AVR
Family Name
90P
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
27
Interface Type
SPI/USART
On-chip Adc
11-chx10-bit
Number Of Timers
2
Processor Series
AT90PWMx
Core
AVR8
Data Ram Size
512 B
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
Minimum Operating Temperature
- 40 C
On-chip Dac
10 bit, 1 Channel
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90PWM3B-16MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT90PWM3B-16MUR
Manufacturer:
TI
Quantity:
1 829
- Current page: 275 of 361
- Download datasheet (7Mb)
24.7.10
24.7.11
24.7.12
4317J–AVR–08/10
Preventing Flash Corruption
Programming Time for Flash when Using SPM
Simple Assembly Code Example for a Boot Loader
value of the Extended Fuse byte (EFB) will be loaded in the destination register as shown below.
Refer to
byte.
Fuse and Lock bits that are programmed, will be read as zero. Fuse and Lock bits that are
unprogrammed, will be read as one.
During periods of low V
too low for the CPU and the Flash to operate properly. These issues are the same as for board
level systems using the Flash, and the same design solutions should be applied.
A Flash program corruption can be caused by two situations when the voltage is too low. First, a
regular write sequence to the Flash requires a minimum voltage to operate correctly. Secondly,
the CPU itself can execute instructions incorrectly, if the supply voltage for executing instructions
is too low.
Flash corruption can easily be avoided by following these design recommendations (one is
sufficient):
1. If there is no need for a Boot Loader update in the system, program the Boot Loader Lock
2. Keep the AVR RESET active (low) during periods of insufficient power supply voltage.
3. Keep the AVR core in Power-down sleep mode during periods of low V
The calibrated RC Oscillator is used to time Flash accesses.
gramming time for Flash accesses from the CPU.
Table 24-5.
Bit
Rd
Flash write (Page Erase, Page Write, and
write Lock bits by SPM)
bits to prevent any Boot Loader software updates.
This can be done by enabling the internal Brown-out Detector (BOD) if the operating volt-
age matches the detection level. If not, an external low V
used. If a reset occurs while a write operation is in progress, the write operation will be
completed provided that the power supply voltage is sufficient.
vent the CPU from attempting to decode and execute instructions, effectively protecting
the SPMCSR Register and thus the Flash from unintentional writes.
;-the routine writes one page of data from RAM to Flash
; the first data location in RAM is pointed to by the Y pointer
; the first data location in Flash is pointed to by the Z-pointer
;-error handling is not included
;-the routine must be placed inside the Boot space
; (at least the Do_spm sub routine). Only code inside NRWW section can
; be read during Self-Programming (Page Erase and Page Write).
;-registers used: r0, r1, temp1 (r16), temp2 (r17), looplo (r24),
; loophi (r25), spmcrval (r20)
; storing and restoring of registers is not included in the routine
; register usage can be optimized at the expense of code size
Table 25-4 on page 280
SPM Programming Time
Symbol
7
–
CC
, the Flash program can be corrupted because the supply voltage is
6
–
for detailed description and mapping of the Extended Fuse
5
–
Min Programming Time
4
–
3.7 ms
EFB3
3
AT90PWM2/3/2B/3B
CC
EFB2
Table 24-5
reset protection circuit can be
2
Max Programming Time
EFB1
1
shows the typical pro-
CC
. This will pre-
4.5 ms
EFB0
0
275
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