AT90PWM3B-16MU Atmel, AT90PWM3B-16MU Datasheet - Page 177
AT90PWM3B-16MU
Manufacturer Part Number
AT90PWM3B-16MU
Description
IC MCU AVR RISC 8K FLASH 32-QFN
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet
1.AT90PWM3B-16SU.pdf
(361 pages)
Specifications of AT90PWM3B-16MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
27
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-QFN
Package
32QFN EP
Device Core
AVR
Family Name
90P
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
27
Interface Type
SPI/USART
On-chip Adc
11-chx10-bit
Number Of Timers
2
Processor Series
AT90PWMx
Core
AVR8
Data Ram Size
512 B
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
Minimum Operating Temperature
- 40 C
On-chip Dac
10 bit, 1 Channel
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90PWM3B-16MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT90PWM3B-16MUR
Manufacturer:
TI
Quantity:
1 829
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17.2
17.2.1
4317J–AVR–08/10
SS Pin Functionality
Slave Mode
Note:
When the SPI is configured as a Slave, the Slave Select (SS) pin is always input. When SS is
held low, the SPI is activated, and MISO becomes an output if configured so by the user. All
other pins are inputs. When SS is driven high, all pins are inputs, and the SPI is passive, which
Assembly Code Example
C Code Example
TABLE 2.
SPI_SlaveInit:
SPI_SlaveReceive:
void SPI_SlaveInit(void)
{
}
char SPI_SlaveReceive(void)
{
}
; Set MISO output, all others input
ldi
out
; Enable SPI
ldi
out
ret
; Wait for reception complete
sbis SPSR,SPIF
rjmp SPI_SlaveReceive
; Read received data and return
in
ret
/* Set MISO output, all others input */
DDR_SPI = (1<<DD_MISO);
/* Enable SPI */
SPCR = (1<<SPE);
/* Wait for reception complete */
while(!(SPSR & (1<<SPIF)))
/* Return data register */
return SPDR;
1. The example code assumes that the part specific header file is included.
;
r17,(1<<DD_MISO)
DDR_SPI,r17
r17,(1<<SPE)
SPCR,r17
r16,SPDR
(1)
(1)
AT90PWM2/3/2B/3B
177
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