AT90PWM3B-16MU Atmel, AT90PWM3B-16MU Datasheet - Page 231

• Manufacturer Part Number: AT90PWM3B-16MU
• Description: IC MCU AVR RISC 8K FLASH 32-QFN
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM3B-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-QFN
• Package: 32QFN EP
• Device Core: AVR
• Family Name: 90P
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 27
• Interface Type: SPI/USART
• On-chip Adc: 11-chx10-bit
• Number Of Timers: 2
• Processor Series: AT90PWMx
• Core: AVR8
• Data Ram Size: 512 B
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 10 bit, 1 Channel
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

20.2.5
20.2.6
4317J–AVR–08/10
Digital Input Disable Register 0 – DIDR0
Digital Input Disable Register 1– DIDR1
AC2IE in AC2CON register is set. Anyway, this bit is cleared by writing a logical one on it.
This bit can also be used to synchronize ADC or DAC conversions.
• Bit 5– AC1IF: Analog Comparator 1 Interrupt Flag Bit
This bit is set by hardware when comparator 1 output event triggers off the interrupt mode
defined by AC1IS1 and AC1IS0 bits in AC1CON register.
This bit is cleared by hardware when the corresponding interrupt vector is executed in case the
AC1IE in AC1CON register is set. Anyway, this bit is cleared by writing a logical one on it.
This bit can also be used to synchronize ADC or DAC conversions.
• Bit 5– AC0IF: Analog Comparator 0 Interrupt Flag Bit
This bit is set by hardware when comparator 0 output event triggers off the interrupt mode
defined by AC0IS1 and AC0IS0 bits in AC0CON register.
This bit is cleared by hardware when the corresponding interrupt vector is executed in case the
AC0IE in AC0CON register is set. Anyway, this bit is cleared by writing a logical one on it.
This bit can also be used to synchronize ADC or DAC conversions.
• Bit 2– AC2O: Analog Comparator 2 Output Bit
AC2O bit is directly the output of the Analog comparator 2.
Set when the output of the comparator is high.
Cleared when the output comparator is low.
• Bit 1– AC1O: Analog Comparator 1 Output Bit
AC1O bit is directly the output of the Analog comparator 1.
Set when the output of the comparator is high.
Cleared when the output comparator is low.
• Bit 0– AC0O: Analog Comparator 0 Output Bit
AC0O bit is directly the output of the Analog comparator 0.
Set when the output of the comparator is high.
Cleared when the output comparator is low.
• Bit 3:2 – ACMPM and ACMP2D: ACMPM and ACMP2 Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding Analog pin is dis-
abled. The corresponding PIN Register bit will always read as zero when this bit is set. When an
analog signal is applied to one of these pins and the digital input from this pin is not needed, this
bit should be written logic one to reduce power consumption in the digital input buffer.
• Bit 5, 2: ACMP0D and ACMP1 Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding analog pin is dis-
abled. The corresponding PIN Register bit will always read as zero when this bit is set. When an
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
ADC7D
R/W
7
0
7
0
-
-
ADC6D
R/W
6
0
6
0
-
-
ACMP0D
ADC5D
R/W
R/W
5
0
5
0
AMP0PD
ADC4D
R/W
R/W
4
0
4
0
AMP0ND
ACMPM
ADC3D
R/W
R/W
3
0
3
0
AT90PWM2/3/2B/3B
ACMP2D
ACMP1D
ADC10D
ADC2D
R/W
R/W
2
0
2
0
AMP1PD
ADC1D
ADC9D
R/W
R/W
1
0
1
0
AMP1ND
ADC0D
ADC8D
R/W
R/W
0
0
0
0
DIDR0
DIDR1
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