PIC18F1220-I/SS Microchip Technology, PIC18F1220-I/SS Datasheet - Page 9

IC MCU FLASH 2KX16 A/D 20SSOP

PIC18F1220-I/SS

Manufacturer Part Number
PIC18F1220-I/SS
Description
IC MCU FLASH 2KX16 A/D 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F1220-I/SS

Program Memory Type
FLASH
Program Memory Size
4KB (2K x 16)
Package / Case
20-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
7-ch x 10-bit
Package
20SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164307 - MODULE SKT FOR PM3 28SSOPAC164018 - MODULE SKT PROMATEII 20SSOP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
2.6
The PGC pin is used as a clock input pin and the PGD
pin is used for entering command bits and data input/
output during serial operation. Commands and data are
transmitted on the rising edge of PGC, latched on the
falling edge of PGC and are Least Significant bit (LSb)
first.
2.6.1
All instructions are 20 bits, consisting of a leading 4-bit
command, followed by a 16-bit operand which depends
on the type of command being executed. To input a
command, PGC is cycled four times. The commands
needed for programming and verification are shown in
Table 2-3.
Depending on the 4-bit command, the 16-bit operand
represents 16 bits of input data, or 8 bits of input data
and 8 bits of output data.
Throughout this specification, commands and data are
presented as illustrated in Table 2-4. The 4-bit command
is shown Most Significant bit (MSb) first. The command
operand, or “Data Payload”, is shown <MSB><LSB>.
Figure 2-10 demonstrates how to serially present a
20-bit command/operand to the device.
2.6.2
The core instruction passes a 16-bit instruction to the
CPU core for execution. This is needed to set up
registers as appropriate for use with other commands.
FIGURE 2-10:
© 2009 Microchip Technology Inc.
PGC
PGD
Serial Program/Verify Operation
4-BIT COMMANDS
CORE INSTRUCTION
P3
4-Bit Command
1
P2
1
2
P4
0
TABLE WRITE, POST-INCREMENT TIMING (1101)
3
1
4
1
P2A
P5
P2B
1
0
2
0
0
3
0
4
0
5
0
6
0
PGD = Input
16-Bit Data Payload
4
7
1
8
0
9
TABLE 2-3:
TABLE 2-4:
0
Core Instruction
(shift in16-bit instruction)
Shift out TABLAT Register
Table Read
Table Read, Post-Increment
Table Read, Post-Decrement
Table Read, Pre-Increment
Table Write
Table Write, Post-Increment by 2
Table Write, Start Programming,
Post-Increment by 2
Table Write, Start Programming
Command
10
0
1101
4-Bit
C
11
1
PIC18F1230/1330
12
1
13
Description
Payload
1
3C 40
Data
14
COMMANDS FOR
PROGRAMMING
SAMPLE COMMAND
SEQUENCE
1
3
15
0
16
Table Write,
post-increment by 2
0
P5A
Fetch Next 4-Bit Command
Core Instruction
1
n
2
n
DS39752B-page 9
3
n
Command
4
n
0000
0010
1000
1001
1010
1011
1100
1101
1110
1111
4-Bit

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