PIC18F1220-I/SS Microchip Technology, PIC18F1220-I/SS Datasheet - Page 25

IC MCU FLASH 2KX16 A/D 20SSOP

PIC18F1220-I/SS

Manufacturer Part Number
PIC18F1220-I/SS
Description
IC MCU FLASH 2KX16 A/D 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F1220-I/SS

Program Memory Type
FLASH
Program Memory Size
4KB (2K x 16)
Package / Case
20-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
7-ch x 10-bit
Package
20SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164307 - MODULE SKT FOR PM3 28SSOPAC164018 - MODULE SKT PROMATEII 20SSOP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
5.0
The PIC18F1230/1330 devices have several Configura-
tion Words. These bits can be set or cleared to select
various device configurations. All other memory areas
should be programmed and verified prior to setting
Configuration Words. These bits may be read out nor-
mally, even after read or code protection. See Table 5-1
for a list of Configuration bits and Device IDs and
Table 5-3 for the Configuration bit descriptions.
5.1
A user may store identification information (ID) in eight
ID locations, mapped in 200000h:200007h. It is
recommended that the most significant nibble of each
ID be Fh. In doing so, if the user code inadvertently tries
to execute from the ID space, the ID data will execute
as a NOP.
TABLE 5-1:
TABLE 5-2:
© 2009 Microchip Technology Inc.
300001h
300002h
300003h
300004h
300005h
300006h
300008h
300009h
30000Ah
30000Bh
30000Ch
30000Dh
3FFFFEh
3FFFFFh
Legend:
Note 1:
PIC18F1230
PIC18F1330
PIC18F1330-ICD
Note:
File Name
CONFIGURATION WORD
ID Locations
CONFIG1H
CONFIG2L
CONFIG2H
CONFIG3L
CONFIG3H MCLRE
CONFIG4L BKBUG
CONFIG5L
CONFIG5H
CONFIG6L
CONFIG6H WRTD
CONFIG7L
CONFIG7H
DEVID1
DEVID2
x = unknown, u = unchanged, - = unimplemented.Shaded cells are unimplemented, read as ‘0’.
DEVID registers are read-only and cannot be programmed by the user.
The ‘x’s in DEVID1 contain the device revision code.
Device
CONFIGURATION BITS AND DEVICE IDs
DEVICE ID VALUE
(1)
(1)
DEV10
DEV2
IESO
Bit 7
CPD
FCMEN
EBTRB
XINST
WRTB
DEV1
DEV9
Bit 6
CPB
BBSIZ1
WRTC
DEV0
DEV8
Bit 5
DEVID2
WDTPS3
BBSIZ0
BORV1
REV4
DEV7
1Eh
1Eh
1Fh
Bit 4
T1OSCMX
WDTPS2
FOSC3
BORV0
DEEV6
HPOL
REV3
5.2
The Device ID Word for the PIC18F1230/1330 devices
is located at 3FFFFEh:3FFFFFh. These bits may be
used by the programmer to identify what device type is
being programmed and read out normally, even after
code or read protection. See Table 5-2 for a complete
list of Device ID values.
FIGURE 5-1:
Bit 3
Device ID Value
Device ID Word
WDTPS1 WDTPS0 WDTEN
PIC18F1230/1330
BOREN1 BOREN0 PWRTEN
FOSC2
LPOL
REV2
DEV5
Bit 2
Set TBLPTR = 3FFFFE
with Post-Increment
with Post-Increment
PWMPIN
Read High Byte
FOSC1
Read Low Byte
EBTR1
WRT1
REV1
DEV4
Bit 1
CP1
READ DEVICE ID WORD
FLOW
Done
Start
000x xxxx
001x xxxx
111x xxxx
DEVID1
STVREN
FLTAMX
FOSC0
EBTR0
WRT0
REV0
DEV3
Bit 0
CP0
DS39752B-page 25
Unprogrammed
See Table 5-2
See Table 5-2
00-- 0111
---1 1111
---1 1111
---- 111-
1--- 0--1
1000 ---1
---- --11
11-- ----
---- --11
111- ----
---- --11
-1-- ----
Default/
Value

Related parts for PIC18F1220-I/SS