ATTINY861-20SU Atmel, ATTINY861-20SU Datasheet - Page 98

• Manufacturer Part Number: ATTINY861-20SU
• Description: IC MCU AVR 8K FLASH 20MHZ 20SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY861-20SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Cpu Family: ATtiny
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: USI
• Total Internal Ram Size: 512Byte
• # I/os (max): 16
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 11-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Package Type: SOIC
• Processor Series: ATTINY8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRMC320
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRBC100 - REF DESIGN KIT BATTERY CHARGER770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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ATtiny261/461/861
Figure 12-10. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC1x / OC1x) from the
Dead Time Generator if either of the COM1x1:0 bits are set. However, the OC1x pin direction
(input or output) is still controlled by the Data Direction Register (DDR) for the port pin. The Data
Direction Register bit for the OC1x and OC1x pins (DDR_OC1x and DDR_OC1x) must be set as
output before the OC1x and OC1x values are visible on the pin. The port override function is
independent of the Output Compare mode.
clk I/O
PORTB0
DDRB0
PORTB1
DDRB1
PORTB2
DDRB2
PORTB3
DDRB3
PORTB4
DDRB4
PORTB5
DDRB5
D Q
D Q
D Q
D Q
D Q
D Q
D Q
D Q
D Q
D Q
D Q
D Q
OCW1A
clk Tn
OCW1B
OCW1D
clk Tn
clk Tn
Generator A
Generator B
Generator D
Dead Time
Dead Time
Dead Time
WGM11
OC1OE1:0
COM1A1:0
WGM11
OC1OE3:2
COM1B1:0
WGM11
OC1OE5:4
COM1D1:0
Q
Q
Q
Q
Q
Q
OC1B
OC1B
OC1A
OC1A
OC1D
OC1D
0
1
Output Compare
Pin Configuration
2
1
0
2
1
0
Output Compare
Pin Configuration
Output Compare
Pin Configuration
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
2588E–AVR–08/10
OC1A
OC1A
OC1B
OC1B
OC1D
OC1D
PIN
PIN
PIN
PIN
PIN
PIN