ATTINY861-20SU Atmel, ATTINY861-20SU Datasheet - Page 166

• Manufacturer Part Number: ATTINY861-20SU
• Description: IC MCU AVR 8K FLASH 20MHZ 20SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY861-20SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Cpu Family: ATtiny
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: USI
• Total Internal Ram Size: 512Byte
• # I/os (max): 16
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 11-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Package Type: SOIC
• Processor Series: ATTINY8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRMC320
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRBC100 - REF DESIGN KIT BATTERY CHARGER770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.3
17.4
166
Performing a Page Write
Addressing the Flash During Self-Programming
ATtiny261/461/861
If the EEPROM is written in the middle of an SPM Page Load operation, all data loaded will be
lost.
To execute Page Write, set up the address in the Z-pointer, write “00000101” to SPMCSR and
execute SPM within four clock cycles after writing SPMCSR. The data in R1 and R0 is ignored.
The page address must be written to PCPAGE. Other bits in the Z-pointer must be written to
zero during this operation.
Note:
The Z-pointer is used to address the SPM commands.
Since the Flash is organized in pages (see
be treated as having two different sections. One section, consisting of the least significant bits, is
addressing the words within a page, while the most significant bits are addressing the pages.
This is shown in
addressed independently. Therefore it is of major importance that the software addresses the
same page in both the Page Erase and Page Write operation.
The LPM instruction uses the Z-pointer to store the address. Since this instruction addresses the
Flash byte-by-byte, also the LSB (bit Z0) of the Z-pointer is used.
Figure 17-1. Addressing the Flash During SPM
Note:
Bit
ZH (R31)
ZL (R30)
Z - REGISTER
The CPU is halted during the Page Write operation.
The different variables used in
PROGRAM MEMORY
BIT
15
Z15
Z7
7
PAGE
PROGRAM
COUNTER
15
Figure
PAGE ADDRESS
WITHIN THE FLASH
ZPCMSB
14
Z14
Z6
6
PCMSB
17-1. Note that the Page Erase and Page Write operations are
PCPAGE
13
Z13
Z5
5
Figure 17-1
ZPAGEMSB
12
Z12
Z4
4
PAGEMSB
Table 18-7 on page
PCWORD
are listed in
WORD ADDRESS
WITHIN A PAGE
11
Z11
Z3
3
1
0
0
INSTRUCTION WORD
Table 18-7 on page
10
Z10
Z2
2
PAGE
173), the Program Counter can
9
Z9
Z1
1
PCWORD[PAGEMSB:0]:
173.
00
01
02
PAGEEND
8
Z8
Z0
0
2588E–AVR–08/10