ATA6612P-PLPW Atmel, ATA6612P-PLPW Datasheet - Page 277
![MCU W/LIN TXRX REG WTCHDG 48-QFN](/photos/6/82/68297/48-qfn_sml.jpg)
ATA6612P-PLPW
Manufacturer Part Number
ATA6612P-PLPW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet
1.ATA6612-EK.pdf
(364 pages)
Specifications of ATA6612P-PLPW
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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6.21.6
6.21.6.1
9111H–AUTO–01/11
ADC Conversion Result
ADC Multiplexer Selection Register – ADMUX
After the conversion is complete (ADIF is high), the conversion result can be found in the ADC
Result Registers (ADCL, ADCH).
For single ended conversion, the result is
where V
Table 6-98 on page 277
0x3FF represents the selected reference voltage minus one LSB.
Table 6-98.
ADC
• Bit 7:6 – REFS1:0: Reference Selection Bits
• Bit 5 – ADLAR: ADC Left Adjust Result
• Bit 4 – Res: Reserved Bit
• Bits 3:0 – MUX3:0: Analog Channel Selection Bits
Initial Value
Read/Write
REFS1
These bits select the voltage reference for the ADC, as shown in
are changed during a conversion, the change will not go in effect until this conversion is
complete (ADIF in ADCSRA is set). The internal voltage reference options may not be
used if an external reference voltage is being applied to the AREF pin.
The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data
Register. Write one to ADLAR to left adjust the result. Otherwise, the result is right
adjusted. Changing the ADLAR bit will affect the ADC Data Register immediately, regard-
less of any ongoing conversions. For a complete description of this bit (see
Data Register – ADCL and ADCH” on page
This bit is an unused bit in the Atmel
The value of these bits selects which analog inputs are connected to the ADC. See
6-99 on page 278
will not go in effect until this conversion is complete (ADIF in ADCSRA is set).
0
0
1
1
Bit
=
IN
V
---------------------------- -
IN
is the voltage on the selected input pin and V
V
REFS0
REF
Voltage Reference Selections for ADC
1024
REFS1
0
1
0
1
R/W
7
0
Voltage Reference Selection
AREF, Internal V
AV
Reserved
Internal 1.1V Voltage Reference with external capacitor at AREF pin
for details. If these bits are changed during a conversion, the change
REFS0
R/W
CC
and
6
0
with external capacitor at AREF pin
Table 6-99 on page
ADLAR
R/W
5
0
ref
turned off
®
ATA6612/ATA6613, and will always read as zero.
R
4
–
0
Atmel ATA6612/ATA6613
280).
278). 0x000 represents analog ground, and
MUX3
R/W
3
0
REF
the selected voltage reference (see
MUX2
R/W
2
0
MUX1
R/W
Table
1
0
6-98. If these bits
MUX0
R/W
0
0
“The ADC
ADMUX
Table
277
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