ATA6612P-PLPW Atmel, ATA6612P-PLPW Datasheet - Page 259
ATA6612P-PLPW
Manufacturer Part Number
ATA6612P-PLPW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet
1.ATA6612-EK.pdf
(364 pages)
Specifications of ATA6612P-PLPW
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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6.19.8.5
Table 6-94.
9111H–AUTO–01/11
Status Code
(TWSR)
Prescaler Bits
are 0
0xF8
0x00
Miscellaneous States
Status of the 2-wire Serial
Bus and 2-wire Serial
Interface Hardware
No relevant state information
available; TWINT = “0”
Bus error due to an illegal
START or STOP condition
Miscellaneous States
Figure 6-95. Formats and States in the Slave Transmitter Mode
There are two status codes that do not correspond to a defined TWI state (see
Status 0xF8 indicates that no relevant information is available because the TWINT Flag is not
set. This occurs between other states, and when the TWI is not involved in a serial transfer.
Status 0x00 indicates that a bus error has occurred during a 2-wire Serial Bus transfer. A bus
error occurs when a START or STOP condition occurs at an illegal position in the format
frame. Examples of such illegal positions are during the serial transfer of an address byte, a
data byte, or an acknowledge bit. When a bus error occurs, TWINT is set. To recover from a
bus error, the TWSTO Flag must set and TWINT must be cleared by writing a logic one to it.
This causes the TWI to enter the not addressed Slave mode and to clear the TWSTO Flag (no
other bits in TWCR are affected). The SDA and SCL lines are released, and no STOP condi-
tion is transmitted.
Reception of the own
slave address and one or
more data bytes
Arbitration lost as master
and addressed as slave
Last data byte transmitted.
Switched to not addressed
slave (TWEA = '0')
No TWDR action
No TWDR action
To/from TWDR
From master to slave
From slave to master
Application Software Response
S
STA
0
SLA
No TWCR action
STO
1
To TWCR
R
DATA
TWINT TWEA
1
$A8
$B0
A
A
n
Atmel ATA6612/ATA6613
A
X
DATA
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the 2-Wire Serial Bus. The
prescaler bits are zero or masked to zero
Next Action Taken by TWI Hardware
Wait or proceed current transfer
Only the internal hardware is affected, no STOP
condition is sent on the bus. In all cases, the bus
is released and TWSTO is cleared.
$B8
A
DATA
$C0
$C8
A
A
Table
P or S
All 1's
6-94).
P or S
259
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