ATA6612P-PLPW Atmel, ATA6612P-PLPW Datasheet - Page 180
ATA6612P-PLPW
Manufacturer Part Number
ATA6612P-PLPW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet
1.ATA6612-EK.pdf
(364 pages)
Specifications of ATA6612P-PLPW
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 180 of 364
- Download datasheet (7Mb)
6.15.9
6.15.9.1
180
Atmel ATA6612/ATA6613
Asynchronous operation of the Timer/Counter
Asynchronous Operation of Timer/Counter2
When Timer/Counter2 operates asynchronously, some considerations must be taken.
• Bit 0 – TOV2: Timer/Counter2 Overflow Flag
• Warning: When switching between asynchronous and synchronous clocking of
• The CPU main clock frequency must be more than four times the Oscillator frequency.
• When writing to one of the registers TCNT2, OCR2x, or TCCR2x, the value is transferred
• When entering Power-save or ADC Noise Reduction mode after having written to TCNT2,
• If Timer/Counter2 is used to wake the device up from Power-save or ADC Noise Reduction
Timer/Counter2, the Timer Registers TCNT2, OCR2x, and TCCR2x might be corrupted. A
safe procedure for switching clock source is:
to a temporary register, and latched after two positive edges on TOSC1. The user should
not write a new value before the contents of the temporary register have been transferred
to its destination. Each of the five mentioned registers have their individual temporary
register, which means that e.g. writing to TCNT2 does not disturb an OCR2x write in
progress. To detect that a transfer to the destination register has taken place, the
Asynchronous Status Register – ASSR has been implemented.
OCR2x, or TCCR2x, the user must wait until the written register has been updated if
Timer/Counter2 is used to wake up the device. Otherwise, the MCU will enter sleep mode
before the changes are effective. This is particularly important if any of the Output
Compare2 interrupt is used to wake up the device, since the Output Compare function is
disabled during writing to OCR2x or TCNT2. If the write cycle is not finished, and the MCU
enters sleep mode before the corresponding OCR2xUB bit returns to zero, the device will
never receive a compare match interrupt, and the MCU will not wake up.
mode, precautions must be taken if the user wants to re-enter one of these modes: The
interrupt logic needs one TOSC1 cycle to be reset. If the time between wake-up and
re-entering sleep mode is less than one TOSC1 cycle, the interrupt will not occur, and the
device will fail to wake up. If the user is in doubt whether the time before re-entering
Power-save or ADC Noise Reduction mode is sufficient, the following algorithm can be
used to ensure that one TOSC1 cycle has elapsed:
The TOV2 bit is set (one) when an overflow occurs in Timer/Counter2. TOV2 is cleared by
hardware when executing the corresponding interrupt handling vector. Alternatively, TOV2
is cleared by writing a logic one to the flag. When the SREG I-bit, TOIE2A
(Timer/Counter2 Overflow Interrupt Enable), and TOV2 are set (one), the Timer/Counter2
Overflow interrupt is executed. In PWM mode, this bit is set when Timer/Counter2
changes counting direction at 0x00.
a. Disable the Timer/Counter2 interrupts by clearing OCIE2x and TOIE2.
b. Select clock source by setting AS2 as appropriate.
c. Write new values to TCNT2, OCR2x, and TCCR2x.
d. To switch to asynchronous operation: Wait for TCN2xUB, OCR2xUB, and
e. Clear the Timer/Counter2 Interrupt Flags.
f.
TCR2xUB.
Enable interrupts, if needed.
9111H–AUTO–01/11
Related parts for ATA6612P-PLPW
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
BOARD DEMO LIN-MCM FOR ATA6612
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
DEV KIT FOR AVR/AVR32
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
INTERVAL AND WIPE/WASH WIPER CONTROL IC WITH DELAY
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Low-Voltage Voice-Switched IC for Hands-Free Operation
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
MONOLITHIC INTEGRATED FEATUREPHONE CIRCUIT
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
AM-FM Receiver IC U4255BM-M
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Monolithic Integrated Feature Phone Circuit
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Multistandard Video-IF and Quasi Parallel Sound Processing
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
High-performance EE PLD
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
8-bit Flash Microcontroller
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
2-Wire Serial EEPROM
Manufacturer:
ATMEL Corporation
Datasheet: