ATA6612P-PLPW Atmel, ATA6612P-PLPW Datasheet - Page 128
ATA6612P-PLPW
Manufacturer Part Number
ATA6612P-PLPW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet
1.ATA6612-EK.pdf
(364 pages)
Specifications of ATA6612P-PLPW
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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6.12.8.2
128
Atmel ATA6612/ATA6613
Timer/Counter Control Register B – TCCR0B
• Bit 7 – FOC0A: Force Output Compare A
• Bit 6 – FOC0B: Force Output Compare B
• Bits 5:4 – Res: Reserved Bits
• Bit 3 – WGM02: Waveform Generation Mode
• Bits 2:0 – CS02:0: Clock Select
Read/Write
Initial Value
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the
FOC0A bit, an immediate Compare Match is forced on the Waveform Generation unit. The
OC0A output is changed according to its COM0A1:0 bits setting. Note that the FOC0A bit
is implemented as a strobe. Therefore it is the value present in the COM0A1:0 bits that
determines the effect of the forced compare.
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode
using OCR0A as TOP.
The FOC0A bit is always read as zero.
The FOC0B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the
FOC0B bit, an immediate Compare Match is forced on the Waveform Generation unit. The
OC0B output is changed according to its COM0B1:0 bits setting. Note that the FOC0B bit
is implemented as a strobe. Therefore it is the value present in the COM0B1:0 bits that
determines the effect of the forced compare.
A FOC0B strobe will not generate any interrupt, nor will it clear the timer in CTC mode
using OCR0B as TOP.
The FOC0B bit is always read as zero.
These bits are reserved bits in the Atmel
zero.
See the description in the
The three Clock Select bits select the clock source to be used by the Timer/Counter.
Bit
FOC0A
W
7
0
FOC0B
W
6
0
“Timer/Counter Control Register A – TCCR0A” on page
R
5
–
0
R
4
–
0
®
ATA6612/ATA6613 and will always read as
WGM02
R
3
0
CS02
R
2
0
CS01
R/W
1
0
CS00
R/W
9111H–AUTO–01/11
0
0
TCCR0B
125.
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