ATA6616-P3QW Atmel, ATA6616-P3QW Datasheet - Page 55

• Manufacturer Part Number: ATA6616-P3QW
• Description: TXRX MULTICHIP MOD LIN SIP 38QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6616-P3QW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 38-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.5.2.7
4.5.3
4.5.3.1
9132D–AUTO–12/10
Dynamic Clock Switch
Clock Output Buffer
Features
Table 4-13.
Note that the System Clock Prescaler can be used to implement run-time changes of the inter-
nal clock frequency while still ensuring stable operation. Refer to
page 61
If not using a crystal oscillator, the device can output the system clock on the CLKO pin. To
enable the output, the CKOUT Fuse or COUT bit of CLKSELR register has to be programmed.
This option is useful when the device clock is needed to drive other circuits on the system.
Note that the clock will not be output during reset and the normal operation of I/O pin will be
overridden when the fuses are programmed. If the System Clock Prescaler is used, it is the
divided system clock that is output.
The Atmel
turn on and off clocks of the device on the fly. The built-in de-glitching circuitry allows clocks to
be enabled or disabled asynchronously. This enables efficient power management schemes
to be implemented easily and quickly. In a safety application, the dynamic clock switch circuit
allows continuous monitoring of the external clock permitting a fallback scheme in case of
clock failure.
The control of the dynamic clock switch circuit must be supervised by software. This operation
is facilitated by the following features:
Notes:
• Safe commands, to avoid unintentional commands, a special write procedure must be
• Exclusive action, the actions are controlled by a decoding table (commands) written to the
CSUT1..0
SUT1..0
followed to change the CLKCSR register bits
page
CLKCSR register. This ensures that only one command operation can be launched at any
time. The main actions of the decoding table are:
– ‘Disable Clock Source’,
– ‘Enable Clock Source’,
– ‘Request Clock Availability’,
– ‘Clock Source Switching’,
– ‘Recover System Clock Source’,
– ‘Enable Watchdog in Automatic Reload Mode’.
00
01
10
11
1. Flash Fuse bits
2. CLKSELR register bits
3. Additional delay (+ 4ms) available if RSTDISBL fuse is set
for details.
62.):
®
(1)
(2)
ATtiny87/167 provides a powerful dynamic clock switch circuit that allows users to
Start-up Times for the External Clock Selection
Start-up Time from
Power-down/save
6CK
6CK
6CK
Additional Delay from Reset
14CK (+ 4.1ms
Atmel ATA6616/ATA6617
14CK + 4.1ms
14CK + 65ms
(Vcc = 5.0V)
(See “CLKPR – Clock Prescaler Register” on
Reserved
(3)
)
“System Clock Prescaler” on
Recommended Usage
Slowly rising power
Fast rising power
BOD enabled
55