ATA6616-P3QW Atmel, ATA6616-P3QW Datasheet - Page 126

• Manufacturer Part Number: ATA6616-P3QW
• Description: TXRX MULTICHIP MOD LIN SIP 38QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6616-P3QW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 38-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.11.11.2
4.11.11.3
126
Atmel ATA6616/ATA6617
Timer/Counter0 Control Register B – TCCR0B
Timer/Counter0 Register – TCNT0
• Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0A
bit, an immediate Compare Match is forced on the Waveform Generation unit. The OC0A out-
put is changed according to its COM0A1:0 bits setting. Note that the FOC0A bit is
implemented as a strobe. Therefore it is the value present in the COM0A1:0 bits that deter-
mines the effect of the forced compare.
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR0A as TOP.
The FOC0A bit is always read as zero.
• Bit 6:3 – Res: Reserved Bits
These bits are reserved in the Atmel
• Bit 2:0 – CS02:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see
Table
Table 4-34.
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes) the Com-
pare Match on the following timer clock. Modifying the counter (TCNT0) while the counter is
running, introduces a risk of missing a Compare Match between TCNT0 and the OCR0x
Register.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
CS02
4-34.
0
0
0
0
1
1
1
1
TCNT07
FOC0A
Clock Select Bit Description
R/W
W
7
0
7
0
CS01
0
0
1
1
0
0
1
1
TCNT06
R/W
R
6
–
0
6
0
TCNT05
CS00
R/W
R
0
1
0
1
0
1
0
1
5
0
5
–
0
®
ATtiny87/167 and will always read as zero.
TCNT04
R/W
Description
No clock source (Timer/Counter stopped).
clk
clk
clk
clk
clk
clk
clk
4
0
R
4
–
0
T0S
T0S
T0S
T0S
T0S
T
T
0
0
S
S
/256 (From prescaler)
/1024 (From prescaler)
/8 (From prescaler)
/32 (From prescaler)
/64 (From prescaler)
/128 (From prescaler)
(No prescaling)
TCNT03
R/W
3
0
R
3
–
0
TCNT02
R/W
CS02
R/W
2
0
2
0
TCNT01
R/W
CS01
R/W
1
0
1
0
TCNT00
R/W
CS00
R/W
0
0
9132D–AUTO–12/10
0
0
TCCR0B
TCNT0