ATMEGA16U2-AUR Atmel, ATMEGA16U2-AUR Datasheet - Page 227
![MCU AVR 8K FLASH 16MHZ 32TQFP](/photos/6/91/69154/313-32-tqfp_sml.jpg)
ATMEGA16U2-AUR
Manufacturer Part Number
ATMEGA16U2-AUR
Description
MCU AVR 8K FLASH 16MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA16U2-AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
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23.4
23.4.1
23.4.2
7799D–AVR–11/10
Read-While-Write and No Read-While-Write Flash Sections
RWW – Read-While-Write Section
NRWW – No Read-While-Write Section
Whether the CPU supports Read-While-Write or if the CPU is halted during a Boot Loader soft-
ware update is dependent on which address that is being programmed. In addition to the two
sections that are configurable by the BOOTSZ Fuses as described above, the Flash is also
divided into two fixed sections, the Read-While-Write (RWW) section and the No Read-While-
Write (NRWW) section. The limit between the RWW- and NRWW sections is given in
1
Note that the user software can never read any code that is located inside the RWW section dur-
ing a Boot Loader software operation. The syntax “Read-While-Write section” refers to which
section that is being programmed (erased or written), not which section that actually is being
read during a Boot Loader software update.
If a Boot Loader software update is programming a page inside the RWW section, it is possible
to read code from the Flash, but only code that is located in the NRWW section. During an on-
going programming, the software must ensure that the RWW section never is being read. If the
user software is trying to read code that is located inside the RWW section (i.e., by load program
memory, call, or jump instructions or an interrupt) during programming, the software might end
up in an unknown state. To avoid this, the interrupts should either be disabled or moved to the
Boot Loader section. The Boot Loader section is always located in the NRWW section. The
RWW Section Busy bit (RWWSB) in the Store Program Memory Control and Status Register
(SPMCSR) will be read as logical one as long as the RWW section is blocked for reading. After
a programming is completed, the RWWSB must be cleared by software before reading code
located in the RWW section.
ister” on page 242.
The code located in the NRWW section can be read when the Boot Loader software is updating
a page in the RWW section. When the Boot Loader code updates the NRWW section, the CPU
is halted during the entire Page Erase or Page Write operation.
Table 23-1.
Address During the Programming?
• When erasing or writing a page located inside the RWW section, the NRWW section can be
• When erasing or writing a page located inside the NRWW section, the CPU is halted during
and
Which Section does the Z-pointer
read during the operation.
the entire operation.
Figure 23-1 on page
NRWW Section
RWW Section
Read-While-Write Features
for details on how to clear RWWSB.
228. The main difference between the two sections is:
See “SPMCSR – Store Program Memory Control and Status Reg-
Which Section Can
be Read During
Programming?
NRWW Section
None
ATmega8U2/16U2/32U2
Is the CPU
Halted?
Yes
No
Read-While-Write
Supported?
Yes
No
Table 23-
227
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