PIC16LF1826-I/MV Microchip Technology, PIC16LF1826-I/MV Datasheet - Page 44

IC MCU 8BIT FLASH 28UQFN

PIC16LF1826-I/MV

Manufacturer Part Number
PIC16LF1826-I/MV
Description
IC MCU 8BIT FLASH 28UQFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16LF1826-I/MV

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-UFQFN Exposed Pad
Controller Family/series
PIC16LF
No. Of I/o's
16
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
32MHz
No. Of Timers
3
Processor Series
PIC16LF
Core
PIC
Data Ram Size
256 B
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F/LF1826/27
FIGURE 3-8:
3.4.2
If the STVREN bit in Configuration Word 2 is set to ‘1’,
the device will be reset if the stack is PUSHed beyond
the sixteenth level or POPed beyond the first level,
setting the appropriate bits (STKOVF or STKUNF,
respectively) in the PCON register.
3.5
The INDFn registers are not physical registers. Any
instruction that accesses an INDFn register actually
accesses the register at the address specified by the
File Select Registers (FSR). If the FSRn address
specifies one of the two INDFn registers, the read will
return ‘0’ and the write will not occur (though Status bits
may be affected). The FSRn register value is created
by the pair FSRnH and FSRnL.
The FSR registers form a 16-bit address that allows an
addressing space with 65536 locations. These locations
are divided into three memory regions:
• Traditional Data Memory
• Linear Data Memory
• Program Flash Memory
DS41391C-page 44
Indirect Addressing
TOSH:TOSL
OVERFLOW/UNDERFLOW RESET
ACCESSING THE STACK EXAMPLE 4
0x0E
0x0D
0x0C
0x0B
0x0A
0x0F
0x06
0x05
0x00
0x09
0x08
0x07
0x04
0x03
0x02
0x01
Preliminary
Return Address
Return Address
Return Address
Return Address
Return Address
Return Address
Return Address
Return Address
Return Address
Return Address
Return Address
Return Address
Return Address
Return Address
Return Address
Return Address
When the stack is full, the next
interrupt will set the Stack Pointer to
0x10. This is identical to address 0x00
so the stack will wrap and overwrite the
return address at 0x00. If the Stack
Overflow/Underflow Reset is enabled, a
Reset will occur and location 0x00 will
not be overwritten.
STKPTR = 0x10
 2010 Microchip Technology Inc.
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