ATTINY13A-SU Atmel, ATTINY13A-SU Datasheet - Page 113

• Manufacturer Part Number: ATTINY13A-SU
• Description: IC MCU AVR 1K FLASH 20MHZ 8SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY13A-SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 1KB (512 x 16)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Cpu Family: ATtiny
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: SPI
• Total Internal Ram Size: 64Byte
• # I/os (max): 6
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 1.8V
• On-chip Adc: 4-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 8
• Package Type: SOIC EIAJ
• Processor Series: ATTINY1x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAKSTK511
• Minimum Operating Temperature: - 40 C
• Package: 8SOIC EIAJ
• Family Name: ATtiny
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• For Use With: ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Lead Free Status / Rohs Status: Compliant

Table 17-13. High-Voltage Serial Programming Instruction Set for ATtiny13A (Continued)
Note:
Note:
17.8
17.8.1
8126E–AVR–07/10
Instruction
Read Signature
Bytes
Read
Calibration Byte
Load “No
Operation”
Command
a = address high bits, b = address low bits, d = data in high bits, e = data in low bits, p = data out high bits, q = data out low bits,
x = don’t care, 1 = Lock Bit1, 2 = Lock Bit2, 3 = CKSEL0 fuse, 4 = CKSEL1 fuse, 5 = SUT0 fuse, 6 = SUT1 fuse, 7 = CKDIV8,
fuse, 8 = WDTON fuse, 9 = EESAVE fuse, A = SPIEN fuse, B = RSTDISBL fuse, C = BODLEVEL0 fuse, D= BODLEVEL1 fuse,
E = MONEN fuse, F = SELFPRGEN fuse
The EEPROM is written page-wise. But only the bytes that are loaded into the page are actually written to the EEPROM. Page-
wise EEPROM access is more efficient when multiple bytes are to be written to the same page. Note that auto-erase of
EEPROM is not available in High-voltage Serial Programming, only in SPI Programming.
Considerations for Efficient Programming
Chip Erase
SDI
SII
SDO
SDI
SII
SDO
SDI
SII
SDO
0_0000_1000_00
0_0100_1100_00
0_0000_1000_00
0_0100_1100_00
0_0000_0000_00
0_0100_1100_00
x_xxxx_xxxx_xx
x_xxxx_xxxx_xx
x_xxxx_xxxx_xx
Instr.1/5
The loaded command and address are retained in the device during programming. For efficient
programming, the following should be considered.
The Chip Erase will erase the Flash and EEPROM
not reset until the Program memory has been completely erased. The fuse bits are not changed.
A Chip Erase must be performed before the Flash and/or EEPROM are re-programmed.
Note:
• The command needs only be loaded once when writing or reading multiple memory
• Skip writing the data value 0xFF that is the contents of the entire EEPROM (unless the
• Address High byte needs only be loaded before programming or reading a new 256 word
1. Load command “Chip Erase” (see
2. Wait after Instr. 3 until SDO goes high for the “Chip Erase” cycle to finish.
3. Load Command “No Operation”.
locations.
EESAVE fuse is programmed) and Flash after a Chip Erase.
window in Flash or 256 byte EEPROM. This consideration also applies to Signature bytes
reading.
1. The EEPROM memory is preserved during Chip Erase if the EESAVE fuse is programmed.
0_0000_00bb_00
0_0000_1100_00
0_0000_000b_00
0_0000_1100_00
x_xxxx_xxxx_xx
x_xxxx_xxxx_xx
Instr.2/6
Instruction Format
0_0000_0000_00
0_0000_0000_00
0_0110_1000_00
0_0111_1000_00
x_xxxx_xxxx_xx
x_xxxx_xxxx_xx
Instr.3
Table 17-13 on page
q_qqqq_qqqx_xx
p_pppp_pppx_xx
0_0000_0000_00
0_0000_0000_00
0_0110_1100_00
0_0111_1100_00
(1)
memories plus lock bits. The lock bits are
Instr.4
111).
Operation Remarks
Repeats Instr 2 4 for each
signature byte address.
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