AT89LP214-20XU Atmel, AT89LP214-20XU Datasheet - Page 57

• Manufacturer Part Number: AT89LP214-20XU
• Description: MCU 8051 2K FLASH 20MHZ 14-TSSOP
• Manufacturer: Atmel
• Series: 89LPr

Specifications of AT89LP214-20XU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 14-TSSOP
• Package: 14TSSOP
• Device Core: 8051
• Family Name: AT89
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 12
• Interface Type: SPI/UART
• Number Of Timers: 2
• Core: 8051
• Processor Series: AT89x
• Maximum Clock Frequency: 20 MHz
• Data Ram Size: 128 B
• Mounting Style: SMD/SMT
• Height: 1.05 mm
• Length: 5.1 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.4 V
• Width: 4.5 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Table 19-1.
Note:
Figure 19-1. Negative Edge with Debouncing Example
3538E–MICRO–11/10
Symbol
CIDL
CF
CEN
CM [2:0]
ACSR = 97H
Not Bit Addressable
Bit
1. Debouncing modes require the use of Timer 1 to generate the sampling delay.
Function
Comparator Idle Enable. If CIDL = 1 the comparator will continue to operate during Idle mode. If CIDL = 0 the
comparator is powered down during Idle mode. The comparator is always shut down during Power-down mode.
Comparator Interrupt Flag. Set when the comparator output meets the conditions specified by the CM [2:0] bits and CEN
is set. The flag must be cleared by software. The interrupt may be enabled/disabled by setting/clearing bit 6 of IE.
Comparator Enable. Set this bit to enable the comparator. Clearing this bit will force the comparator output low and
prevent further events from setting CF. When CEN = 1 the analog input pins, P1.0 and P1.1, have their digital inputs
disabled.
Comparator Interrupt Mode
CM2
0
0
0
0
1
1
1
1
ACSR
–
7
– Analog Comparator Control & Status Register
CM1
0
0
1
1
0
0
1
1
Timer 1 Overflow
Comparator Out
CM0
0
1
0
1
0
1
0
1
–
6
CF
Start
Interrupt Mode
Negative (Low) level
Positive edge
Toggle with debouncing
Positive edge with debouncing
Negative edge
Toggle
Negative edge with debouncing
Positive (High) level
CIDL
5
Compare
CF
4
(1)
Start
(1)
(1)
CEN
3
Compare
CM3
2
Reset Value = XXX0 0000B
AT89LP213/214
CM1
1
CM0
0
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