M30624FGAFP#U5 Renesas Electronics America, M30624FGAFP#U5 Datasheet - Page 481

• Manufacturer Part Number: M30624FGAFP#U5
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30624FGAFP#U5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Cpu Family: M16C
• Device Core Size: 16/32Bit
• Frequency (max): 16MHz
• Interface Type: SIM/UART
• Total Internal Ram Size: 20KB
• # I/os (max): 87
• Number Of Timers - General Purpose: 11
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.2V
• On-chip Adc: 10-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: PQFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

2-162
Key-Input Interrupt
2.13 Key-Input Interrupt Usage
Figure 2.13.1. Memory map of key-input interrupt-related registers
2.13.1 Overview of the key-input interrupt usage
Key-input interrupt occurs when a falling edge is input to P10
of the key-input interrupt usage:
(1) Enabling/disabling the key-input interrupt
(2) Occurrence timing of the key-input interrupt
(3) How to determine a key-input interrupt
(4) Registers related to the key-input interrupt
The key-input interrupt can be enabled and disabled using the key-input interrupt register. The key-
input interrupt is affected by the interrupt priority level (IPL) and the interrupt enable flag (I flag).
With key-input interrupt acceptance enabled, pins P10
key-input interrupt pins (KI
key-input interrupt pin. At this moment, the level of other key-input interrupt pins must be “H”. No
interrupt occurs when the level of other key-input interrupt pins is “L”.
A key-input interrupt occurs when a falling edge is input to one of four pins, but each pin has the same
vector address.
Therefore, read the input level of pins P10
mine the interrupted pin.
Figure 2.13.1 shows the memory map of key-input interrupt-related registers, and Figure 2.13.2
shows key-input interrupt-related registers.
004D
03FE
03F6
16
16
16
Port P10 direction register (PD10)
_____
Key input interrupt control register(KUPIC)
Pull-up control register 2 (PUR2)
0
through KI
_____
3
). A key-input interrupt occurs when a falling edge is input to a
4
through P10
4
through P10
4
7
through P10
in the key-input interrupt routine to deter-
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
7
, which are set to input, become
7
. The following is an overview
M16C / 62A Group
Mitsubishi microcomputers