DF2505BR26DV Renesas Electronics America, DF2505BR26DV Datasheet - Page 731
DF2505BR26DV
Manufacturer Part Number
DF2505BR26DV
Description
IC H8S/2505 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Specifications of DF2505BR26DV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2505BR26DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Bit
7
6
5
4
3
2
1
0
Bit Name
TDER
TDA6
TDA5
TDA4
TDA3
TDA2
TDA1
TDA0
Initial
Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Transfer Destination Address Setting Error
This bit is set to 1 when the address specified by bits TDA6
to TDA0, which is the start address to download an on-chip
program, is over the range. Whether or not the range
specified by bits TDA6 to TDA0 is within the range of H'00
to H'07 is determined when an on-chip program is
downloaded by setting the SCO bit in FCCS. Make sure
that this bit is cleared to 0 before setting the SCO bit to 1
and the value specified by TDA6 to TDA0 is within the
range of H'00 to H'07.
0: The value specified by bits TDA6 to TDA0 is within the
1: The value specified by is TDA6 to TDA0 is over the
Transfer Destination Address
Specifies the start address to download an on-chip
program. H'00 to H'07 can be specified meaning that the
start address in the on-chip RAM space can be specified in
units of 4 kbytes.
H'00: H'FF9000 is specified as a start address to download
H'01: H'FFA000 is specified as a start address to download
H'02: H'FFB000 is specified as a start address to download
H'03: H'FFC000 is specified as a start address to download
H'04: H'FFD000 is specified as a start address to download
H'05: H'FFE000 is specified as a start address to download
H'06: H'FF8000 is specified as a start address to download
H'07: H'FF7000 is specified as a start address to download
H'08 to H'FF: Setting prohibited. Specifying this value sets
range.
range (H'08 to H'FF) and the download is stopped.
an on-chip program.
an on-chip program.
an on-chip program.
an on-chip program.
an on-chip program.
an on-chip program.
an on-chip program.
an on-chip program.
the TDRE bit to 1 and stops the download.
Rev. 6.00 Sep. 24, 2009 Page 683 of 928
Section 20 Flash Memory
REJ09B0099-0600
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