MCIMX357CJQ5C Freescale Semiconductor, MCIMX357CJQ5C Datasheet - Page 106

MPU MX35 ARM11 400-MAPBGA

MCIMX357CJQ5C

Manufacturer Part Number
MCIMX357CJQ5C
Description
MPU MX35 ARM11 400-MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX35r
Datasheets

Specifications of MCIMX357CJQ5C

Core Processor
ARM11
Core Size
32-Bit
Speed
532MHz
Connectivity
1-Wire, CAN, EBI/EMI, Ethernet, I²C, MMC, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
400-MAPBGA
Processor Series
i.MX357
Core
ARM1136JF-S
Data Bus Width
32 bit
Data Ram Size
128 KB
Interface Type
I2C, JTAG, UART
Maximum Clock Frequency
532 MHz
Number Of Timers
3
Operating Supply Voltage
1.33 V to 1.47 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCIMX357CJQ5C
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MCIMX357CJQ5CR2
Manufacturer:
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Quantity:
10 000
1
2. Make ton and toff large enough to avoid bus contention.
106
There is a special timing requirement in the ATA host that requires the internal DIOW to go high three clocks after the last active
edge on the DSTROBE signal. The equation given on this line tries to capture this constraint.
Parameter
tdzfs
ATA
tenv
tzah
tack
tcyc
tcvh
tmli
tds
tdh
trp
Parameters
Figure
Figure
Figure 82
i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 9
from
tdzfs
tmli1
tds1
tdh1
tzah
tack
tenv
tx1
tcvh
tc1
ton
toff
trp
Figure 82. UDMA-In Device Terminates Transfer Timing Diagram
1
80,
81,
tack (min.) = (time_ack × T) – (tskew1 + tskew2)
tenv (min.) = (time_env × T) – (tskew1 + tskew2)
tenv (max.) = (time_env × T) + (tskew1 + tskew2)
tds – (tskew3) – ti_ds > 0
tdh – (tskew3) – ti_dh > 0
(tcyc – tskew > T
trp (min.) = time_rp × T – (tskew1 + tskew2 + tskew6)
(time_rp × T) – (tco + tsu + 3T + 2 × tbuf + 2 × tcable2) > trfs (drive)
tmli1 (min.) = (time_mlix + 0.4) × T
tzah (min.) = (time_zah + 0.4) × T
tdzfs = (time_dzfs × T) – (tskew1 + tskew2)
tcvh = (time_cvh × T) – (tskew1 + tskew2)
ton = time_on × T – tskew1
toff = time_off × T – tskew1
Table 69. UDMA-In Burst Timing Parameters
Description
Freescale Semiconductor
should be low enough
Controlling Variable
tskew3, ti_ds, ti_dh
T big enough
time_dzfs
time_mlix
time_ack
time_env
time_zah
time_cvh
time_rp
time_rp

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