EZ80F91NA050EC Zilog, EZ80F91NA050EC Datasheet - Page 195

IC ACCLAIM MCU 256KB 144-BGA

EZ80F91NA050EC

Manufacturer Part Number
EZ80F91NA050EC
Description
IC ACCLAIM MCU 256KB 144-BGA
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Datasheets

Specifications of EZ80F91NA050EC

Core Processor
Z8
Core Size
8-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LBGA
Data Bus Width
8 bit
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Number Of Timers
16 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
For Use With
269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
No
Other names
269-3250

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80F91NA050EC
Manufacturer:
Zilog
Quantity:
10 000
Part Number:
EZ80F91NA050EC00TR
Manufacturer:
Zilog
Quantity:
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Table 99. UART Interrupt Identification Registers
PS019215-0910
Bit
Reset
CPU Access
Note: R = Read only.
Bit 
Position
[7]
FSTS
[6:4]
[3:1]
INSTS
0
INTBIT
UART Interrupt Identification Register
The Read Only UARTx_IIR register allows you to check whether the FIFO is enabled and
the status of interrupts. These registers share the same I/O addresses as the UARTx_FCTL
registers. See
Table 100. UART Interrupt Status Codes
Value
0
1
000
000–
110
0
1
INSTS
Value
011
010
110
101
001
000
Description
FIFO is disabled.
FIFO is enabled.
Reserved.
Interrupt Status Code.
The code indicated in these three bits is valid only if INTBIT is
1. If two internal interrupt sources are active and their
respective enable bits are High, only the higher priority
interrupt is seen by the application. The lower-priority interrupt
code is indicated only after the higher-priority interrupt is
serviced.
There is an active interrupt source within the UART.
There is not an active interrupt source within the UART.
Priority
Highest
Second
Third
Fourth
Fifth
Lowest
R
7
0
Table 99
R
6
0
Table 100
and
Interrupt Type
Receiver Line Status
Receive Data Ready or Trigger Level
Character Time-out
Transmission Complete
Transmit Buffer Empty
Modem Status
Table
R
5
0
lists the interrupt status codes.
100.
R
4
0
(UART0_IIR = 00C2h, UART1_IIR = 00D2h)
R
3
0
Universal Asynchronous Receiver/Transmitter
R
2
0
R
1
0
Product Specification
R
0
1
eZ80F91 MCU
186

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