ST10F272Z2Q3 STMicroelectronics, ST10F272Z2Q3 Datasheet - Page 43

MCU 16BIT 256KB FLASH 144-PQFP

ST10F272Z2Q3

Manufacturer Part Number
ST10F272Z2Q3
Description
MCU 16BIT 256KB FLASH 144-PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F272Z2Q3

Core Processor
ST10
Core Size
16-Bit
Speed
64MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-5579

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST10F272Z2Q3
Manufacturer:
E-CMOS
Quantity:
10 000
Part Number:
ST10F272Z2Q3
Manufacturer:
STMicroelectronics
Quantity:
10 000
ST10F272Z2
Suspend and resume
Word Program, Double Word Program, and Sector Erase operations can be suspended in
the following way:
Then the operation can be resumed in the following way:
Before resuming a suspended Erase, FCR1H/FCR1L must be read to check if the Erase is
already completed (FCR1H = FCR1L = 0x0000 if Erase is complete). Original setup of
Select Operation bits in FCR0H/L must be restored before the operation resume, otherwise
the operation is aborted and bit RESER of FER is set.
Erase suspend, program and resume
A Sector Erase operation can be suspended in order to program (Word or Double Word)
another Sector.
Example: Sector Erase of sector B0F1 of IFLASH Module.
Example: Sector Erase Suspend.
Example: Word Program of data 0x5555AAAA at address 0x045554 in IFLASH module.
Once the Program operation is finished, the Erase operation can be resumed in the
following way:
Notice that during the Program Operation in Erase suspend, bits SER and SUSP are low. A
Word or Double Word Program during Erase Suspend cannot be suspended.
In summary:
FCR0H
FCR0H
FCR0H
FCR0H
FCR1L
FCR0H
FCR0H
do
{tmp1
} while ((tmp1 && 0x0010) || (tmp2 && 0x8000));
FCR0H
FCR0H|= 0x2000;/*Set WPG in FCR0H*/
FARL
FARH
FDR0L
FDR0H
FCR0H
FCR0H|= 0x0800;/*Set SER in FCR0H*/
FCR0H|= 0x8000;/*Operation resume*/
tmp2
|= 0x4000;
|= 0x0800;
|= 0x8000;
|= 0x0800;
|= 0x0002;
|= 0x8000;
|= 0x4000;
= FCR0L;
= FCR0H;
&= 0xBFFF;
|= 0x8000;
= 0x5554;
= 0x0004;
= 0xAAAA;
= 0x5555;
/*Set SER in FCR0H*/
/*Set B0F1*/
/*Operation start*/
/*Set SUSP in FCR0H*/
/*Loop to wait for LOCK=0 and WMS=0*/
/*Rst SUSP in FCR0H*/
/*Set SUSP in FCR0H*/
/*Set SER in FCR0H*/
/*Operation resume*/
/*Load Add in FARL*/
/*Load Add in FARH*/
/*Load Data in FDR0L*/
/*Load Data in FDR0H*/
/*Operation start*/
Internal Flash memory
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