Z8F0413HH005EG Zilog, Z8F0413HH005EG Datasheet - Page 98

• Manufacturer Part Number: Z8F0413HH005EG
• Description: IC ENCORE MCU FLASH 4K 20SSOP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F0413HH005EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-SSOP
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Other names: 269-4108; Z8F0413HH005EG

PS024314-0308
Watchdog Timer Refresh
Watchdog Timer Time-Out Response
When first enabled, the WDT is loaded with the value in the Watchdog Timer Reload
registers. The Watchdog Timer counts down to
executed by the eZ8 CPU. Execution of the
reloaded with the WDT Reload value stored in the Watchdog Timer Reload registers.
Counting resumes following the reload operation.
When Z8 Encore! XP
OCD), the Watchdog Timer is continuously refreshed to prevent any Watchdog Timer
time-outs.
The Watchdog Timer times out when the counter reaches
Watchdog Timer generates either an interrupt or a system reset. The WDT_RES Flash
Option Bit determines the time-out response of the Watchdog Timer. For information on
programming of the WDT_RES Flash Option Bit, see
WDT Interrupt in Normal Operation
If configured to generate an interrupt when a time-out occurs, the Watchdog Timer issues
an interrupt request to the interrupt controller and sets the WDT status bit in the Watchdog
Timer Control register. If interrupts are enabled, the eZ8 CPU responds to the interrupt
request by fetching the Watchdog Timer interrupt vector and executing code from the
vector address. After time-out and interrupt generation, the Watchdog Timer counter rolls
over to its maximum value of
counter is not automatically returned to its Reload Value.
The Reset Status Register (see
clearing the WDT interrupt. This read clears the WDT time-out Flag and prevents further
WDT interrupts for immediately occurring.
WDT Interrupt in STOP Mode
If configured to generate an interrupt when a time-out occurs and Z8 Encore! XP F0823
Series are in STOP mode, the Watchdog Timer automatically initiates a Stop Mode Recov-
ery and generates an interrupt request. Both the WDT status bit and the STOP bit in the
Watchdog Timer Control register are set to 1 following a WDT time-out in STOP mode.
For more information on Stop Mode Recovery, see
page 21.
If interrupts are enabled, following completion of the Stop Mode Recovery the eZ8 CPU
responds to the interrupt request by fetching the Watchdog Timer interrupt vector and
executing code from the vector address.
®
F0823 Series devices are operating in DEBUG Mode (using the
FFFFFH
Reset Status Register
and continues counting. The Watchdog Timer
WDT
000000H
instruction causes the down counter to be
Reset and Stop Mode Recovery
on page 28) must be read before
Flash Option Bits
Z8 Encore! XP
unless a
000000H
Product Specification
WDT
. A time-out of the
instruction is
®
on page 141.
F0823 Series
Watchdog Timer
on
88