PIC18F2220-I/SP Microchip Technology, PIC18F2220-I/SP Datasheet - Page 65

• Manufacturer Part Number: PIC18F2220-I/SP
• Description: IC MCU FLASH 2KX16 A/D 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2220-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 4KB (2K x 16)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 25
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI/I2C/USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, ICE2000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• Package: 28SPDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 5-2:
© 2007 Microchip Technology Inc.
OSCCON
LVDCON
WDTCON
RCON
TMR1H
TMR1L
T1CON
TMR2
PR2
T2CON
SSPBUF
SSPADD
SSPSTAT
SSPCON1
SSPCON2
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
CCPR1H
CCPR1L
CCP1CON
CCPR2H
CCPR2L
CCP2CON
PWM1CON
ECCPAS
CVRCON
CMCON
TMR3H
TMR3L
T3CON
SPBRG
RCREG
TXREG
TXSTA
RCSTA
Legend:
Note
File Name
1:
2:
3:
4:
5:
6:
(5)
(5)
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition
RA6 and associated bits are configured as port pins in RCIO, ECIO and INTIO2 (with port function on RA6) Oscillator mode only and read
as ‘0’ in all other oscillator modes.
RA7 and associated bits are configured as port pins in INTIO2 Oscillator mode only and read as ‘0’ in all other modes.
Bit 21 of the PC is only available in Test mode and Serial Programming modes.
If PBADEN = 0, PORTB<4:0> are configured as digital inputs and read unknown and if PBADEN = 1, PORTB<4:0> are configured as
analog inputs and read as ‘0’ following a Reset.
These registers and/or bits are not implemented on the PIC18F2X20 devices and read as 0x00.
The RE3 port bit is available as an input only pin only in 40-pin devices when Master Clear functionality is disabled (CONFIG3H<7> = 0).
Timer1 Register High Byte
Timer1 Register Low Byte
Timer2 Register
Timer2 Period Register
MSSP Receive Buffer/Transmit Register
MSSP Address Register in I
A/D Result Register High Byte
A/D Result Register Low Byte
Capture/Compare/PWM Register 1 High Byte
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 2 High Byte
Capture/Compare/PWM Register 2 Low Byte
Timer3 Register High Byte
Timer3 Register Low Byte
USART Baud Rate Generator
USART Receive Register
USART Transmit Register
ECCPASE
P1M1
PRSEN
CVREN
C2OUT
IDLEN
WCOL
GCEN
ADFM
CSRC
SPEN
RD16
RD16
IPEN
Bit 7
SMP
—
—
—
—
—
—
REGISTER FILE SUMMARY (PIC18F2220/2320/4220/4320) (CONTINUED)
(5)
TOUTPS3
ECCPAS2
ACKSTAT
T3CCP2
P1M0
CVROE
T1RUN
SSPOV
C1OUT
IRCF2
PDC6
Bit 6
CKE
RX9
TX9
—
—
—
—
—
—
—
(5)
2
T1CKPS1
TOUTPS2
ECCPAS1
T3CKPS1
C™ Slave mode. MSSP Baud Rate Reload Register in I
SSPEN
ACKDT
VCFG1
ACQT2
DC1B1
DC2B1
IRCF1
IRVST
C2INV
CVRR
SREN
CHS3
PDC5
TXEN
Bit 5
D/A
—
—
TOUTPS1
ECCPAS0
T1CKPS0
T3CKPS0
PIC18F2220/2320/4220/4320
ACKEN
VCFG0
ACQT1
LVDEN
DC1B0
DC2B0
C1INV
IRCF0
SYNC
CREN
CHS2
PDC4
Bit 4
CKP
—
RI
—
P
T1OSCEN
TOUTPS0
CCP1M3
CCP2M3
PSSAC1
T3CCP1
SSPM3
ADDEN
PCFG3
ACQT0
LVDL3
OSTS
RCEN
CHS1
PDC3
CVR3
Bit 3
CIS
TO
—
—
S
TMR2ON
CCP1M2
CCP2M2
T1SYNC
PSSAC0
T3SYNC
SSPM2
PCFG2
ADCS2
LVDL2
BRGH
CHS0
PDC2
CVR2
FERR
IOFS
Bit 2
CM2
R/W
PEN
PD
—
GO/DONE
T2CKPS1
TMR1CS
CCP1M1
CCP2M1
TMR3CS
PSSBD1
SSPM1
PCFG1
ADCS1
LVDL1
OERR
RSEN
PDC1
CVR1
TRMT
SCS1
2
Bit 1
POR
CM1
C Master mode.
UA
—
SWDTEN
T2CKPS0
TMR1ON
TMR3ON
CCP1M0
CCP2M0
PSSBD0
SSPM0
PCFG0
ADCS0
LVDL0
ADON
SCS0
PDC0
CVR0
RX9D
TX9D
Bit 0
BOR
SEN
CM0
BF
0000 q000
--00 0101
0--1 11q0
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
1111 1111
-000 0000
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
--00 0qqq
0-00 0000
xxxx xxxx
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
0000 0000
0000 0000
000- 0000
0000 0111
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
0000 -010
0000 000x
POR, BOR
--- ---0
Value on
DS39599G-page 63
Details on
45, 69, 98
47, 156,
47, 156,
47, 157,
48, 133,
48, 204,
48, 202,
47, 233
47, 247
47, 125
47, 125
47, 121
47, 127
47, 127
47, 127
47, 164
47, 167
48, 220
48, 220
48, 212
48, 213
48, 134
48, 134
48, 134
48, 134
48, 133
48, 149
48, 150
48, 227
48, 221
48, 131
48, 131
48, 129
48, 198
48, 196
48, 197
48, 211
27, 47
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