PIC18F2220-I/SP Microchip Technology, PIC18F2220-I/SP Datasheet - Page 227

• Manufacturer Part Number: PIC18F2220-I/SP
• Description: IC MCU FLASH 2KX16 A/D 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2220-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 4KB (2K x 16)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 25
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI/I2C/USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, ICE2000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• Package: 28SPDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

20.7
When a comparator is active and the device is placed
in a power-managed mode, the comparator remains
active and the interrupt is functional if enabled. This
interrupt will wake-up the device from a power-
managed mode when enabled. Each operational
comparator will consume additional current, as shown
in the comparator specifications. To minimize power
consumption while in a power-managed mode, turn off
the comparators (CM<2:0> = 111) before entering the
power-managed modes. If the device wakes up from a
power-managed mode, the contents of the CMCON
register are not affected.
20.8
A device Reset forces the CMCON register to its Reset
state, causing the comparator module to be in the Com-
parator Reset mode (CM<2:0> = 111). This ensures
that all potential inputs are analog inputs. Device cur-
rent is minimized when digital inputs are present at
Reset time. The comparators will be powered down
during the Reset interval.
FIGURE 20-4:
© 2007 Microchip Technology Inc.
Comparator Operation in
Power-Managed Modes
Effects of a Reset
VA
Legend:
R
S
< 10k
COMPARATOR ANALOG INPUT MODEL
C
V
I
R
R
VA
A
LEAKAGE
T
PIN
IC
S
IN
C
5 pF
PIN
= Input Capacitance
= Threshold Voltage
= Leakage Current at the pin due to various junctions
= Interconnect Resistance
= Source Impedance
= Analog Voltage
PIC18F2220/2320/4220/4320
V
DD
V
V
T
T
= 0.6V
= 0.6V
20.9
A simplified circuit for an analog input is shown in
Figure 20-4. Since the analog pins are connected to a
digital output, they have reverse biased diodes to V
and V
V
more than 0.6V, one of the diodes is forward biased
and a latch-up condition may occur. A maximum source
impedance of 10 kΩ is recommended for the analog
sources.
SS
and V
V
SS
SS
. Therefore, the analog input must be between
Analog Input Connection
Considerations
I
±500 nA
LEAKAGE
DD
. If the input voltage exceeds this range by
R
IC
Comparator
Input
DS39599G-page 225
DD