T89C5115-TISUM Atmel, T89C5115-TISUM Datasheet - Page 58

• Manufacturer Part Number: T89C5115-TISUM
• Description: IC 8051 MCU FLASH 16K 28SOIC
• Manufacturer: Atmel
• Series: 89Cr

Specifications of T89C5115-TISUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 89C5115-TISUM

Mode 0 (13-bit Timer)
Mode 1 (16-bit Timer)
Mode 2 (8-bit Timer with Auto-
Reload)
Mode 3 (Halt)
Interrupt
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AT89C5115
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Mode 0 configures Timer 1 as a 13-bit Timer, which is set up as an 8-bit Timer (TH1 reg-
ister) with a modulo-32 prescaler implemented with the lower 5 bits of the TL1 register
(See Figure 24). The upper 3 bits of TL1 register are ignored. Prescaler overflow incre-
ments TH1 register.
Mode 1 configures Timer 1 as a 16-bit Timer with TH1 and TL1 registers connected in
cascade (See Figure 25). The selected input increments TL1 register.
Mode 2 configures Timer 1 as an 8-bit Timer (TL1 register) with automatic reload from
TH1 register on overflow (See Figure 26). TL1 overflow sets TF1 flag in TCON register
and reloads TL1 with the contents of TH1, which is preset by software. The reload
leaves TH1 unchanged.
Placing Timer 1 in mode 3 causes it to halt and hold its count. This can be used to halt
Timer 1 when TR1 run control bit is not available i.e. when Timer 0 is in mode 3.
Each Timer handles one interrupt source that is the timer overflow flag TF0 or TF1. This
flag is set every time an overflow occurs. Flags are cleared when vectoring to the Timer
interrupt routine. Interrupts are enabled by setting
interrupts are globally enabled by setting EA bit in IEN0 register.
Figure 28. Timer Interrupt System
For normal Timer operation (GATE1= 0), setting TR1 allows TL1 to be incremented
by the selected input. Setting GATE1 and TR1 allows external pin INT1# to control
Timer operation.
Timer 1 overflow (count rolls over from all 1s to all 0s) sets the TF1 flag generating
an interrupt request.
When Timer 0 is in mode 3, it uses Timer 1’s overflow flag (TF1) and run control bit
(TR1). For this situation, use Timer 1 only for applications that do not require an
interrupt (such as a Baud Rate Generator for the Serial Port) and switch Timer 1 in
and out of mode 3 to turn it off and on.
It is important to stop Timer/Counter before changing mode.
TCON.5
TCON.7
TF0
TF1
IEN0.1
IEN0.3
ET0
ET1
ETx
Timer 0
Interrupt Request
Timer 1
Interrupt Request
bit in IEN0 register. This assumes
4128G–8051–02/08