R5F21134DFP#U0 Renesas Electronics America, R5F21134DFP#U0 Datasheet - Page 203
![IC R8C MCU FLASH 32LQFP](/photos/12/18/121815/r5f21134dfp_u0_sml.jpg)
R5F21134DFP#U0
Manufacturer Part Number
R5F21134DFP#U0
Description
IC R8C MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/13r
Datasheets
1.R5F211A2SPU0.pdf
(300 pages)
2.R5F21132FPU0.pdf
(33 pages)
3.R5F21132FPU0.pdf
(226 pages)
4.R5F21134DFPU0.pdf
(224 pages)
Specifications of R5F21134DFP#U0
Core Size
16-Bit
Program Memory Size
16KB (16K x 8)
Oscillator Type
Internal
Core Processor
R8C
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
22
Eeprom Memory Size
4KB
Ram Memory Size
1024Byte
Cpu Speed
20MHz
No. Of Timers
16
Digital Ic Case
RoHS Compliant
Controller Family/series
R8C/13
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21134DFP#U0R5F21134DFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- R5F211A2SPU0 PDF datasheet
- R5F21132FPU0 PDF datasheet #2
- R5F21132FPU0 PDF datasheet #3
- R5F21134DFPU0 PDF datasheet #4
- Current page: 203 of 226
- Download datasheet (3Mb)
R8C/13 Group
Rev.1.20
REJ09B0111-0120
19.2.6 Changing Interrupt Control Register
(1) Each interrupt control register can only be changed while interrupt requests corresponding to that
(2) When changing any interrupt control register after disabling interrupts, be careful with the instruc-
When Changing Any Bit Other Than IR Bit
When Changing IR Bit
(3) When disabling interrupts using the I flag, set the I flag according to the following sample pro-
Sample programs 1 to 3 are preventing the I flag from being set to “1” (interrupt enabled) before writing
to the interrupt control registers for reasons of the internal bus or the instruction queue buffer.
Example 1: Use NOP instructions to prevent I flag being set to “1”
Example 2: Use dummy read to have FSET instruction wait
Example 3: Use POPC instruction to change I flag
Jan 27, 2006
If an interrupt request corresponding to that register is generated while executing the instruction, the
IR bit may not be set to “1” (interrupt requested), and the interrupt request may be ignored. If this
causes a problem, use the following instructions to change the register.
Instructions to use: AND, OR, BCLR, BSET
If the IR bit is set to “0” (interrupt not requested), it may not be set to “0” depending on the instruction
used. Use the MOV instruction to set the IR bit to “0”.
register are not generated. If interrupt requests may be generated, disable the interrupts before
changing the interrupt control register.
tion to be used.
grams. Refer to (2) for the change of interrupt control registers in the sample programs.
INT_SWITCH1:
INT_SWITCH2:
INT_SWITCH3:
FCLR
AND.B
NOP
NOP
FSET
FCLR
AND.B
MOV.W MEM, R0
FSET
PUSHC FLG
FCLR
AND.B
POPC
before interrupt control register is changed
page 190 of 205
I
#00H, 0056H ; Set TXIC register to “00
I
I
#00H, 0056H ; Set TXIC register to “00
I
I
#00H, 0056H ; Set TXIC register to “00
FLG
; Disable interrupts
; Enable interrupts
; Disable interrupts
; Dummy read
; Enable interrupts
; Disable interrupts
; Enable interrupts
16
16
16
”
”
”
19. Usage Notes
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