R5F21134DFP#U0 Renesas Electronics America, R5F21134DFP#U0 Datasheet - Page 182

IC R8C MCU FLASH 32LQFP

R5F21134DFP#U0

Manufacturer Part Number
R5F21134DFP#U0
Description
IC R8C MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/13r
Datasheets

Specifications of R5F21134DFP#U0

Core Size
16-Bit
Program Memory Size
16KB (16K x 8)
Oscillator Type
Internal
Core Processor
R8C
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
22
Eeprom Memory Size
4KB
Ram Memory Size
1024Byte
Cpu Speed
20MHz
No. Of Timers
16
Digital Ic Case
RoHS Compliant
Controller Family/series
R8C/13
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21134DFP#U0R5F21134DFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
R5F21134DFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/13 Group
Rev.1.20
REJ09B0111-0120
17.4.1 EW0 Mode
17.4.2 EW1 Mode
The microcomputer is placed in CPU rewrite mode by setting the FMR01 bit in the FMR0 register to “1”
(CPU rewrite mode enabled), ready to accept commands. In this case, because the FMR1 register's
FMR11 bit = 0, EW0 mode is selected.
Use software commands to control program and erase operations. Read the FMR0 register or status
register to check the status of program or erase operation at completion.
When moving to an erase-suspend during auto-erase, set the FMR40 bit to “1” (erase-suspend en-
abled ) and the FMR41 bit to “1” (erase-suspend requested). Wait for td(SR-ES) and make sure that
the FMR46 bit is set to “1” (enables reading) before accessing the user ROM space. The auto-erase
operation resumes by setting the FMR41 bit to “0” (erase restart).
EW1 mode is selected by setting FMR11 bit to “1” (EW1 mode) after setting the FMR01 bit to “1” (CPU
rewrite mode enabled).
Read the FMR0 register to check the status of program or erase operation at completion. Avoid ex-
ecuting software commands of Read Status register in EW1 mode.
To enable the erase-suspend function, the Block Erase command should be executed after setting the
FMR40 bit to “1” (erase-suspend enabled). An interrupt to request an erase-suspend must be in en-
abled state. After passing td(SR-ES) since the block erase command is executed, an interrupt request
can be acknowledged.
When an interrupt request is generated, FMR41 bit is automatically set to “1” (erase-suspend re-
quested) and the auto-erase operation is halted. If the auto-erase operation is not completed (FMR00
bit is “0”) when the interrupt routine is ended, the Block Erase command should be executed again by
settingthe FMR41 bit to “0” (erase restart).
Jan 27, 2006
page 169 of 205
17.4 CPU Rewrite Mode
17.4 CPU Rewrite Mode

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