R5F21122FP#U0 Renesas Electronics America, R5F21122FP#U0 Datasheet - Page 61

• Manufacturer Part Number: R5F21122FP#U0
• Description: IC R8C MCU FLASH 8K 32LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/12r

Specifications of R5F21122FP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: LED, WDT
• Number Of I /o: 22
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 32-LQFP
• For Use With: R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/12 Group
Rev.1.20
REJ09B0110-0120
Figure 10.14 TCC0 Register and TCC1 Register
10.2.4 INT3 Interrupt
Timer C control register 0
T i m e r C c o n t r o l r e g i s t e r 1
b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0
b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0
0
N O T E S :
INT3 interrupts are triggered by INT3 inputs. The TCC07 bit in the TCC0 register should be se to “0”
(INT3). The INT3 input has a digital filter which can be sampled by one of three sampling clocks. The
sampling clock is selected using the TCC11 to TCC10 bits in the TCC1 register. The IR bit in the
INT3IC register is set to “1” (interrupt requested) when the sampled input level matches three times.
The P3_3 bit in the P3 register indicates the previous value before filtering regardless of values set in
the TCC11 to TCC10 bits.
The INT3 pin is shared with the TC
When setting the TCC07 bit to “1” (f
bit in the INT3IC register is set to “1” (interrupt requested) every f
f
Figure 10.14 shows the TCC0 and TCC1 registers.
1 . C h a n g e t h i s b i t w h e n T C C 0 0 b i t i s s e t t o “ 0 ” ( c o u n t s t o p ) .
2 . T h e I R b i t i n t h e I N T 3 I C m a y b e s e t t o “ 1 ” ( i n t e r r u p t r e q u e s t e d ) w h e n t h e T C C 0 3 , T C C 0 4 , o r T C C 0 7 b i t i s r e w r i t t e n .
Jan 27, 2006
_____
RING128
N O T E S :
______
0 0
0 0
1 . I n p u t i s r e c o g n i z e d o n l y w h e n t h e s a m e v a l u e f r o m I N T 3 p i n i s s a m p l e d t h r e e t i m e s i n s u c c e s s i o n .
R e f e r t o t h e p a r a g r a p h 1 9 . 2 . 5 “ C h a n g i n g I n t e r r u p t F a c t o r ” i n t h e U s a g e N o t e s R e f e r e n c e B o o k .
_______
______
0 0
clock cycle.
_______
0
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Bit symbol
Bit symbol
T C C 0 7
T C C 1 0
T C C 1 1
( b 7 - b 2 )
T C C 0 0
TCC01
T C C 0 2
TCC03
TCC04
(b6-b5)
S y m b o l
T C C 0
S y m b o l
T C C 1
______
INT3 interrupt/capture input
switching bit
Capture control bit
Timer C count source select
bit
INT3 interrupt/capture input
polarity select bit
reserved bit
I N T 3 i n p u t f i l t e r s e l e c t b i t
R e s e r v e d b i t
(1)
IN
RING128
pin.
B i t n a m e
Bit name
(1, 2)
A d d r e s s
A d d r e s s
0 0 9 A
0 0 9 B
), INT3 interrupts are triggered by f
(1, 2)
_____
1 6
1 6
(1 )
A f t e r r e s e t
A f t e r r e s e t
0 : INT3
1 : f
0 : C a p t u r e d i s a b l e d
1 : C a p t u r e e n a b l e d
b2 b1
S e t t o " 0 "
0 0 : f
0 1 : f
1 0 : f
1 1 : Avoid this setting
b4 b3
0 0 : Rising edge
0 1 : Falling edge
1 0 : Both edges
1 1 : Avoid this setting
0 0
0 0
b1 b0
0 0 : N o f i l t e r
0 1 : F i l t e r w i t h f
1 0 : F i l t e r w i t h f
1 1 : F i l t e r w i t h f
Set to "0"
1 6
1 6
RING128
1
8
32
RING128
Function
Function
1
8
3 2
s a m p l i n g
s a m p l i n g
s a m p l i n g
clock cycle or every half
RING128
10.2 INT Interrupt
clock. The IR
R W
R W
R W
R W
R W
R W
RW
RW
RW
RW
R W
R W