MC908JB8ADWE Freescale Semiconductor, MC908JB8ADWE Datasheet - Page 49

• Manufacturer Part Number: MC908JB8ADWE
• Description: IC MCU 3MHZ 8K FLASH 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908JB8ADWE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: USB
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: HC08JB
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: USB
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 5.25 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 256Byte
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
$FE0C
$FE0D
$FE0A
$FE0B
$FE0E
$FFFF
Addr.
$FE06
$FE07
$FE08
$FE09
Break Status and Control
FLASH Control Register
COP Control Register
Register Name
FLASH Block Protect
Break Address High
Break Address low
Figure 2-2. Control, Status, and Data Registers (Sheet 8 of 8)
(BRKSCR)
(COPCTL)
Reserved
Reserved
Reserved
Reserved
(FLBPR)
Register
Register
Register
Register
(BRKH)
(FLCR)
(BRKL)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
BPR7
BRKE
Bit15
Bit 7
Bit7
R
R
R
R
0
0
0
0
0
0
= Unimplemented
BRKA
BPR6
Bit14
Bit6
R
R
R
R
6
0
0
0
0
0
0
Memory Map
BPR5
Bit13
Bit5
Writing clears COP counter (any value)
R
R
R
R
5
0
0
0
0
0
0
0
Low byte of reset vector
Unaffected by reset
BPR4
Bit12
Bit4
R
R
R
R
R
4
0
0
0
0
0
0
0
= Reserved
HVEN
BPR3
Bit11
Bit3
R
R
R
R
3
0
0
0
0
0
0
MASS
BPR2
Bit10
Bit2
R
R
R
R
2
0
0
0
0
0
0
U = Unaffected by reset
ERASE
BPR1
Bit9
Bit1
R
R
R
R
1
0
0
0
0
0
0
Technical Data
Monitor ROM
Memory Map
BPR0
PGM
Bit 0
Bit8
Bit0
R
R
R
R
0
0
0
0
0
0
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