MC908JB8ADWE Freescale Semiconductor, MC908JB8ADWE Datasheet - Page 149

• Manufacturer Part Number: MC908JB8ADWE
• Description: IC MCU 3MHZ 8K FLASH 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908JB8ADWE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: USB
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: HC08JB
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: USB
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 5.25 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 256Byte
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9.8.8 USB Control Register 3
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
* PULLEN bit is reset by POR or LVI reset only.
Address:
TX1ST — Endpoint 0 Transmit First Flag
TX1STR — Clear Endpoint 0 Transmit First Flag
OSTALL0 — Endpoint 0 Force STALL Bit for OUT token
Reset:
Read:
Write:
This read-only bit is set if the endpoint 0 data transmit flag (TXD0F) is
set when the USB control logic is setting the endpoint 0 data receive
flag (RXD0F). In other words, if an unserviced endpoint 0 transmit flag
is still set at the end of an endpoint 0 reception, then this bit will be set.
This bit lets the firmware know that the endpoint 0 transmission
happened before the endpoint 0 reception.
Reset clears this bit.
Writing a logic 1 to this write-only bit will clear the TX1ST bit if it is set.
Writing a logic 0 to the TX1STR has no effect. Reset clears this bit.
This read/write bit causes endpoint 0 to return a STALL handshake
when polled by an OUT token by the USB host controller. Reset
clears this bit.
1 = IN transaction occurred before SETUP/OUT
0 = IN transaction occurred after SETUP/OUT
1 = Send STALL handshake
0 = Default
TX1ST
$001A
Bit 7
Universal Serial Bus Module (USB)
0
Figure 9-22. USB Control Register 3 (UCR3)
= Unimplemented
TX1STR
6
0
0
OSTALL0 ISTALL0
5
0
4
0
Universal Serial Bus Module (USB)
3
0
0
PULLEN ENABLE2 ENABLE1
0*
2
1
0
Technical Data
I/O Registers
Bit 0
0
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