C8051F300-GM Silicon Laboratories Inc, C8051F300-GM Datasheet - Page 171

• Manufacturer Part Number: C8051F300-GM
• Description: IC 8051 MCU 8K FLASH 11QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F30xr

Specifications of C8051F300-GM

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 11-VQFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SMBus, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 8
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F226DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• No. Of I/o's: 8
• Ram Memory Size: 256Byte
• Cpu Speed: 25MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Package: 11QFN EP
• Device Core: 8051
• Family Name: C8051F30x
• Maximum Speed: 25 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1444 - ADAPTER PROGRAM TOOLSTICK F300336-1351 - KIT REF DES TEMP COMPENS RTC336-1348 - KIT STARTER TOOLSTICK336-1283 - KIT REF DESIGN DTMF DECODER336-1278 - KIT TOOL EVAL SYS IN A USB STICK336-1246 - DEV KIT F300/301/302/303/304/305
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1245

17.2. C2 Pin Sharing
The C2 protocol allows the C2 pins to be shared with user functions so that in-system debugging and
Flash programming functions may be performed. This is possible because C2 communication is typically
performed when the device is in the halt state, where all on-chip peripherals and user software are stalled.
In this halted state, the C2 interface can safely ‘borrow’ the C2CK (normally /RST) and C2D (normally
P0.7) pins. In most applications, external resistors are required to isolate C2 interface traffic from the user
application. A typical isolation configuration is shown in Figure 17.1.
The configuration in Figure 17.1 assumes the following:
Additional resistors may be necessary depending on the specific application.
1. The user input (b) cannot change state while the target device is halted.
2. The /RST pin on the target device is used as an input only.
/Reset (a)
Output (c)
Input (b)
Figure 17.1. Typical C2 Pin Sharing
C2 Interface Master
Rev. 2.6
C8051F300/1/2/3/4/5
C8051F300
C2CK (/RST)
C2D (P0.7)
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